ARM64 体系架构
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ARMv8 ELx VBAR
VBAR_EL1, Vector Base Address Register (EL1)Holds the vector base address for any exception that is taken to EL1.VBAR_EL2, Vector Base Address Register (EL2)Holds the vector base address f...原创 2019-11-25 19:00:55 · 1868 阅读 · 0 评论 -
ARM64 el1_irq 处理
.align 6el1_irq: kernel_entry 1 msr daifclr, #1 //enable fiq enable_dbg_if_not_stepping x0#ifdef CONFIG_TRACE_IRQFLAGS bl trace_hardirqs_off#endif#ifdef CONFIG_PREEMPT get_thread_原创 2017-03-23 08:20:57 · 2904 阅读 · 0 评论 -
ARM64 Exception vectors
ARM64 异常向量即 Exception vectors参见源D1.10.2描述。When the PE takes an exception to an Exception level that is using AArch64, execution is forced to an address thatis the exception vector for the except原创 2017-03-23 10:09:09 · 1584 阅读 · 0 评论 -
ARM64 DTS 处理-早期处理
setup_arch() // arch/arm64/kernel/setup.c --> setup_machine_fdt(__fdt_pointer); 检查DTB是否正确,以及早期配置系统 --> unflatten_device_tree();对DTB进行解析,填充设备树结构下内核针对设备树定义的struct device_node类型对象初始化。st...原创 2019-08-15 19:45:32 · 1295 阅读 · 0 评论 -
QCOM KERNEL log for DTB
[ 0.000000] Initializing cgroup subsys cpu[ 0.000000] Initializing cgroup subsys cpuacct[ 0.000000][ 0.000000] Boot CPU: AArch64 Processor [410fd034][ 0.000000] Machine: Qualcomm T...原创 2019-08-16 09:54:02 · 1007 阅读 · 0 评论 -
arm64 el1_sync
/* * EL1 mode handlers. */ .align 6el1_sync: kernel_entry 1 msr daifclr, #1 //enable fiq mrs x1, esr_el1 // read the syndrome register lsr x24, x1, #ESR_EL1_EC_SHIFT // exception原创 2017-03-23 08:20:31 · 1304 阅读 · 0 评论 -
ARM64 宏get_thread_info
.macro get_thread_info, rd mov \rd, sp and \rd, \rd, #~(THREAD_SIZE - 1) // top of stack .endm原创 2017-03-23 08:20:19 · 866 阅读 · 0 评论 -
Linux Kernel之spin_lock之ARM64实现
static inline void arch_spin_lock(arch_spinlock_t *lock){ unsigned int tmp; arch_spinlock_t lockval, newval; asm volatile( /* Atomically increment the next ticket. */ ARM64_LSE_ATOMIC_原创 2017-03-12 11:38:16 · 2295 阅读 · 0 评论 -
ARM64 用户空间时发生中断el0_irq
.align 6el0_irq: kernel_entry 0el0_irq_naked: enable_dbg#ifdef CONFIG_TRACE_IRQFLAGS bl trace_hardirqs_off#endif ct_user_exit irq_handler#ifdef CONFIG_TRACE_IRQFLAGS bl trace_hardirq原创 2017-03-23 08:18:49 · 1949 阅读 · 0 评论 -
ARM64 ret_to_user
慢速返回到用户空间处理/* * "slow" syscall return path. */ret_to_user: disable_irq // disable interrupts ldr x1, [tsk, #TI_FLAGS] and x2, x1, #_TIF_WORK_MASK cbnz x2, work_pending tbz x1, #TI原创 2017-03-23 08:19:02 · 1359 阅读 · 0 评论 -
ARM64 ret_fast_syscall
系统调用返回/* * This is the fast syscall return path. We do as little as possible here, * and this includes saving x0 back into the kernel stack. */ret_fast_syscall: disable_irq // disable原创 2017-03-23 08:19:15 · 1400 阅读 · 0 评论 -
ARM64 disable_irq和enable_irq
arch/arm64include/asm/assembler.h /* * Enable and disable interrupts. */ .macro disable_irq msr daifset, #2 .endm .macro enable_irq msr daifclr, #2 .endm DAIF, Interrupt Mask Bit原创 2017-03-23 08:19:27 · 1530 阅读 · 0 评论 -
RM64 ventry实现
arch/arm64/include/asm/assembler.h /* * Vector entry */ .macro ventry label .align 7 b \label .endm原创 2017-03-23 08:19:41 · 473 阅读 · 0 评论 -
arm64 其他异常
el1_sync_invalid: inv_entry 1, BAD_SYNCENDPROC(el1_sync_invalid)el1_irq_invalid: inv_entry 1, BAD_IRQENDPROC(el1_irq_invalid)el1_fiq_invalid: inv_entry 1, BAD_FIQENDPROC(el1_fiq_invalid)el原创 2017-03-23 08:19:52 · 438 阅读 · 0 评论 -
ARM64 vectors
/* * Exception vectors. */ .align 11ENTRY(vectors) ventry el1_sync_invalid // Synchronous EL1t ventry el1_irq_invalid // IRQ EL1t ventry el1_fiq_invalid // FIQ EL1t ventry el1_error原创 2017-03-23 08:20:08 · 629 阅读 · 0 评论 -
arm64体系架构
ARM64原创 2017-03-12 11:19:05 · 6921 阅读 · 0 评论