解决:If the number of processors is expected to increase from one, then you should configure the numbe

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 1. 按官方说明用 docker 部署 rocketmq ,启动 broker 报错:

OpenJDK 64-Bit Server VM warning: If the number of processors is expected to increase from one, then you should configure the number of parallel GC threads appropriately using -XX:ParallelGCThreads=N
/opt/rocketmq-4.2.0/bin/runbroker.sh: line 71:    22 Killed

2. 按提示找到 对应文件

find / -name *runbroker.sh

查找结果有3个同名文件 ,我不知道是改哪个,于是3个都改了。

/var/lib/docker/overlay2/0aa7531560625ec8a0439bc215ef4628de9c8734ee83a0c503c13127ee723ee0/diff/opt/rocketmq-4.2.0/bin/runbroker.sh
/var/lib/docker/overlay2/cf56ab981f4fb785fc7a78efa1445ff605796bfa4c7f2ae2f621c5a5171408ee/merged/opt/rocketmq-4.2.0/bin/runbroker.sh
/var/lib/docker/overlay2/e0da31f0283ae25bbf6a949d2ebef676f5949f97f6001a4d4c4d63b7bece6c29/diff/opt/rocketmq-4.2.0/bin/runbroker.sh

3. 修改默认大小空间配置,原本是设置的为 4G、4G、8G,我的服务器内存没有那么大。改小就行了,见整个红框中设置。

黄框中是我改后的设置,上面注释掉的那行是原本配置。

改为:JAVA_OPT="${JAVA_OPT} -server -Xms256m -Xmx256m -Xmn128m"

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The Definitive Guide to the ARM® Cortex®-M0 and Cortex-M0+ Processors, Second Edition explains the architectures underneath ARM’s Cortex-M0 and Cortex-M0+ processors and their programming techniques. Written by ARM’s Senior Embedded Technology Manager, Joseph Yiu, the book is packed with examples on how to use the features in the Cortex-M0 and Cortex-M0+ processors. It provides detailed information on the instruction set architecture, how to use a number of popular development suites, an overview of the software development flow, and information on how to locate problems in the program code and software porting. This new edition includes the differences between the Cortex-M0 and Cortex-M0+ processors such as architectural features (e.g. unprivileged execution level, vector table relocation), new chapters on low power designs and the Memory Protection Unit (MPU), the benefits of the Cortex-M0+ processor, such as the new single cycle I/O interface, higher energy efficiency, better performance and the Micro Trace Buffer (MTB) feature, updated software development tools, updated Real Time Operating System examples using Keil™ RTX with CMSIS-RTOS APIs, examples of using various Cortex-M0 and Cortex-M0+ based microcontrollers, and much more. •Provides detailed information on ARM® Cortex®-M0 and Cortex-M0+ Processors, including their architectures, programming model, instruction set, and interrupt handling •Presents detailed information on the differences between the Cortex-M0 and Cortex-M0+ processors •Covers software development flow, including examples for various development tools in both C and assembly languages •Includes in-depth coverage of design approaches and considerations for developing ultra low power embedded systems, the benchmark for energy efficiency in microcontrollers, and examples of utilizing low power features in microcontrollers

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