备忘。
Armv8.1-A
- Atomic memory access instructions (AArch64)
- Limited Order regions (AArch64)
- Increased Virtual Machine Identifier (VMID) size, and Virtualization Host Extensions (AArch64)
- Privileged Access Never (PAN) (AArch32 and AArch64)
Armv8.2-A
- Support for 52-bit addresses (AArch64)
- The ability for PEs to share Translation Lookaside Buffer (TLB) entries (AArch32 and AArch64)
- FP16 data processing instructions (AArch32 and AArch64)
- Statistical profiling (AArch64)
- Reliability Availability Serviceabilty (RAS) support becomes mandatory (AArch32 and AArch64)
Armv8.3-A
- Pointer authentication (AArch64)
- Nested virtualization (AArch64)
- Advanced Single Instruction Multiple Data (SIMD) complex number support (AArch32 and AArch64)
- Improved JavaScript data type conversion support (AArch32 and AArch64)
- A change to the memory consistency model (AArch64)
- ID mechanism support for larger system-visible caches (AArch32 and AArch64)
Armv8.4-A
- Secure virtualization (AArch64)
- Nested virtualization enhancements (AArch64)
- Small translation table support (AArch64)
- Relaxed alignment restrictions (AArch32 and AArch64)
- Memory Partitioning and Monitoring (MPAM) (AArch32 and AArch64)
- Additional crypto support (AArch32 and AArch64)
- Generic counter scaling (AArch32 and AArch64)
- Instructions to accelerate SHA512 and SHA3 (AArch64 only)
如何判断当前CPU使用的Armv8.x的.x是多少呢
没有具体的register指示当前的CPU实现的是Armv8.x . 但有register可以指示当前的CPU实现了Armv8.x所支持的功能。比如,ID_AA64MMFR2_EL1.AT
表示Armv8.4-A是否支持宽松的对齐要求。
Cortex-A Processors supporting Armv8.0-A
- CA32
- CA35
- CA53
- CA57
- CA72
- CA73
Cortex-A Processors supporting Armv8.2-A
- CA55
- CA75
- CA76
- CA78
- CA58
- Cortex-X1