一、程序入口
程序的链接由链接脚本决定的,所以可以通过u-boot.lds 来找到uboot的入口。
从上图可以看出入口为_start,该标签在vector.S中(\arch\arm\lib\vectors.S)
.macro ARM_VECTORS
b reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq
.endm
.globl _start
.section ".vectors", "ax"
_start:
ARM_VECTORS
.globl _undefined_instruction
.globl _software_interrupt
.globl _prefetch_abort
.globl _data_abort
.globl _not_used
.globl _irq
.globl _fiq
_undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
_not_used: .word not_used
_irq: .word irq
_fiq: .word fiq
.balignl 16,0xdeadbeef
所以,设备一上电开始执行reset函数。
reset:
/* Allow the board to save important registers */
b save_boot_params
save_boot_params_ret:
//disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode,except if in HYP mode already
mrs r0, cpsr
and r1, r0, #0x1f @ mask mode bits
teq r1, #0x1a @ test for HYP mode
bicne r0, r0, #0x1f @ clear all mode bits
orrne r0, r0, #0x13 @ set SVC mode
orr r0, r0, #0xc0 @ disable FIQ and IRQ
msr cpsr,r0
#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD))
/* Set V=0 in CP15 SCTLR register - for VBAR to point to vector */
mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register
bic r0, #CR_V @ V = 0
mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTLR Register
/* Set vector address in CP15 VBAR register */
ldr r0, =_start
mcr p15, 0, r0, c12, c0, 0 @Set VBAR
#endif
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_cp15
#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
bl cpu_init_crit
#endif
#endif
bl _main
save_boot_params 没干啥事,直接跳转到save_boot_params_ret。然后关FIQ、IRQ中断,并且设置cpu到SVC32模式。设置中断向量地址寄存器的值为_start地址。
cpu_init_cp15主要设置CP15寄存器,涉及cache、MMU、TLBS。
cpu_init_crit :直接调用lowlevel_init
.pushsection .text.lowlevel_init, "ax"
WEAK(lowlevel_init)
//Setup a temporary stack. Global data is not available yet.
ldr sp, =CONFIG_SYS_INIT_SP_ADDR //SP=0x0091ff00
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
//Set up global data for boards that still need it. This w