jailhouse是西门子开源的嵌入式hypervisor,用于实现资源隔离,同时保证实时性。
相关介绍可以参见:https://blog.csdn.net/v6543210/article/details/113890847
jaihouse提供了一个demo , https://github.com/siemens/jailhouse-images ,可以用于编译一整套可用的demo。
能够针对多个平台生成对应的操作系统镜像。 编译过程主要参考https://blog.csdn.net/weixin_39541632/article/details/110422345
此demo可以生成多个平台所用的操作系统image。
选择4,可以生成用于NUC6CAY平台的操作系统镜像(x86_64架构)。
由于x86的通用性,此镜像也可以在其他x86平台上运行。
例如我选择的是DELL Precision 3431。 12个CPU核。
jailhouse-images 生成用于NUC的操作系统镜像,写入U盘后,用U盘启动电脑。
编写对应的配置文件
jailhouse由于不是特别的成熟,同时对硬件的抽象非常底层,对配置文件的依赖非常重,但是jailhouse的文档却非常少,基本上等同于没有,这对于严重依赖配置文件的系统影响非常大。不光文档少,连官方提供的配置文件在运行时也会出现各种问题,对使用的人来讲,真的是非常不友好。
唯一一个比较完整的配置文件:https://events.static.linuxfound.org/sites/events/files/slides/ELCE2016-Jailhouse-Tutorial.pdf
好在x86平台下jailhouse提供了一个脚本可以自动生成root cell的配置文件。
1.自动生成配置
jailhouse config create dell.c
即可在当前目录下生成对应于当前硬件的 root cell 配置文件。不过光靠自动生成会有很多问题。
不过光靠自动生成会有很多问题。
dell.c内容比较长,为了不影响阅读,dell.c(经过少许修改后的)放在本文最后。
2.对生成的 root cell 进行少许修改
(1)添加 IVSHMEM shared memory regions 和IVSHMEM shared memory regions放到.mem_regions的最前面,因为在pci设备中会用到这些区域的编号。
这一块的内容可以从qemu.c中抄过来。主要的用途是实现root cell 与 none-root cell的通信,实现虚拟网卡(就是那个192.168.19.1的虚拟网卡),用于ssh连接虚拟机中的操作系统,如果没有的话,虚拟机就连接不上,无法进行控制。
.mem_regions = {
/* IVSHMEM shared memory regions (demo) */
{
.phys_start = 0x3f0f0000,
.virt_start = 0x3f0f0000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ,
},
{
.phys_start = 0x3f0f1000,
.virt_start = 0x3f0f1000,
.size = 0x9000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
{
.phys_start = 0x3f0fa000,
.virt_start = 0x3f0fa000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
{
.phys_start = 0x3f0fc000,
.virt_start = 0x3f0fc000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ,
},
{
.phys_start = 0x3f0fe000,
.virt_start = 0x3f0fe000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ,
},
/* IVSHMEM shared memory regions (networking) */
JAILHOUSE_SHMEM_NET_REGIONS(0x3f100000, 0),
(2)添加pci设备,即虚拟网卡
此处shmem_regions_start指的是上面对应的内存区域的编号,从0开始编号,注意
JAILHOUSE_SHMEM_NET_REGIONS(0x3f100000, 0),是一个宏,展开后其实是4个mem_regions,如果有多个JAILHOUSE_SHMEM_NET_REGIONS,在计算shmem_regions_start时要计算正确。
.pci_devices = {
/* lay IVSHMEM: 00:10.0 */
{
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.iommu = 1,
.domain = 0x0,
.bdf = 0x10 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
.num_msix_vectors = 16,
.shmem_regions_start = 0,
.shmem_dev_id = 0,
.shmem_peers = 3,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
},
/* lay IVSHMEM: 00:11.0 */
{
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.iommu = 1,
.domain = 0x0,
.bdf = 0x11 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
.num_msix_vectors = 3,
.shmem_regions_start = 5,
.shmem_dev_id = 0,
.shmem_peers = 2,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
//...
}
(3)添加一些.pio_regions
由于jailhouse提供的脚本中.pio_regions的生成主要是从/proc/ioports这个文件中提取相关信息,但是实际上,有些io端口并不记录在此文件中,导致实际运行时,会出现问题:
Page pool usage after late setup: mem 359/978, remap 16517/131072
FATAL: Invalid PIO read, port: 1771 size: 1
RIP: 0xffffffff9d8f5f48 RSP: 0xffffb84900127dd8 FLAGS: 93
RAX: 0x0000000000000000 RBX: 0x0000000000000002 RCX: 0x0000000000000068
RDX: 0x0000000000001771 RSI: 0xffffffff9e568b80 RDI: 0xffff898449e90498
CS: 10 BASE: 0x0000000000000000 AR-BYTES: 29b EFER.LMA 1
CR0: 0x0000000080050033 CR3: 0x00000003d7c1e000 CR4: 0x00000000003406e0
EFER: 0x0000000000001d01
Parking CPU 1 (Cell: "RootCell")
解决办法就是将 port对应的数字加到pio_regions 中即可。
具体官方作者对此解释可以参见:
https://groups.google.com/g/jailhouse-dev/c/jy8oOJud6YE/m/F6RVzPf_BQAJ
https://groups.google.com/g/jailhouse-dev/c/v4nmbpuw3wg/m/sKY0nmoPBQAJ
比如你按了table键,或者运行了lscpu都有可能触发一些PIO read,导致系统当机。
一般添加所遇到的各类pio_regions后,运行都会比较的丝滑,不会再报此类错误。
编写none root cell配置文件
none root cell配置文件即jailhouse中运行的虚拟操作系统的配置文件,
用于jailhouse新建一个cell,加载linux内核,运行该操作系统。
即下列命令中qemu-linux-demo.cell的源文件
jailhouse cell linux /etc/jailhouse/qemu-linux-demo.cell \
/boot/vmlinuz* \
-i /usr/libexec/jailhouse/demos/rootfs.cpio \
-c "console=ttyS0,115200 ip=192.168.19.2"
主要参考linux-x86-demo.c ,由于linux的参数都是memmap=82M$0x3a000000, 指定预留的内存都是起始地址0x3a000000, 大小82MB,所以地址基本可以不用改。
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_cell_desc cell;
__u64 cpus[1];
struct jailhouse_memory mem_regions[12];
struct jailhouse_pci_device pci_devices[2];//2
} __attribute__((packed)) config = {
.cell = {
.signature = JAILHOUSE_CELL_DESC_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.name = "linux-dell",
.flags = JAILHOUSE_CELL_PASSIVE_COMMREG |
JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED,
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
},
.cpus = {
0b1000,//0xc,
},
.mem_regions = {
/* IVSHMEM shared memory regions (demo) */
{
.phys_start = 0x3f0f0000,
.virt_start = 0x3f0f0000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
},
{
.phys_start = 0x3f0f1000,
.virt_start = 0x3f0f1000,
.size = 0x9000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
{
.phys_start = 0x3f0fa000,
.virt_start = 0x3f0fa000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
},
{
.phys_start = 0x3f0fc000,
.virt_start = 0x3f0fc000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
},
{
.phys_start = 0x3f0fe000,
.virt_start = 0x3f0fe000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
/* IVSHMEM shared memory regions (networking) */
JAILHOUSE_SHMEM_NET_REGIONS(0x3f100000, 1),
/* low RAM */ {
.phys_start = 0x3a600000,
.virt_start = 0,
.size = 0x00100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
JAILHOUSE_MEM_LOADABLE,
},
/* communication region */ {
.virt_start = 0x00100000,
.size = 0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_COMM_REGION,
},
/* high RAM */ {
.phys_start = 0x3a700000,
.virt_start = 0x00200000,
.size = 0x4900000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
JAILHOUSE_MEM_LOADABLE,
},
},
.pci_devices = {
/* IVSHMEM: 00:10.0 */
{
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.iommu = 1,
.domain = 0x0,
.bdf = 0x10 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
.num_msix_vectors = 16,
.shmem_regions_start = 0,
.shmem_dev_id = 2,
.shmem_peers = 3,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
},
/* IVSHMEM: 00:11.0 */
{
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.iommu = 1,
.domain = 0x0,
.bdf = 0x11 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
.num_msix_vectors = 3,
.shmem_regions_start = 5,
.shmem_dev_id = 1,
.shmem_peers = 2,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
},
};
配置文件的编译
以上编写的.c配置文件,直接放到 configs/x86目录下, 在jailhouse的根目录执行
make KDIR=/usr/src/linux-5.4.61
即可将.c编译生成.cell文件。
.c生成 .cell的过程,主要是gcc 将.c 生成.o,再用objcopy 命令将.o中的elf格式相关内容去除,只留下raw格式的内容即为cell文件。
运行none-root cell
到最关键的时刻了,要运行我们编写的cell了,运行如下的命令即可。
jailhouse enable dell.cell
jailhouse cell linux dell-linux.cell \
/boot/vmlinuz* \
-i /usr/libexec/jailhouse/demos/rootfs.cpio \
-c "console=ttyS0,115200 ip=192.168.19.2"
串口输出信息
如果串口工作正常的话,可以看到如下的输出信息:
jailhouse enable的输出
创建cell的输出:
附:dell.c的内容
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[65];//56
struct jailhouse_irqchip irqchips[1];
struct jailhouse_pio pio_regions[14];//10
struct jailhouse_pci_device pci_devices[21];//19
struct jailhouse_pci_capability pci_caps[69];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
.hypervisor_memory = {
.phys_start = 0x3a000000,
.size = 0x600000,
},
.debug_console = {
.address = 0x3f8,
.type = JAILHOUSE_CON_TYPE_8250,
.flags = JAILHOUSE_CON_ACCESS_PIO |
JAILHOUSE_CON_REGDIST_1,
},
.platform_info = {
.pci_mmconfig_base = 0xf0000000,
.pci_mmconfig_end_bus = 0x7f,
.x86 = {
.pm_timer_address = 0x1808,
.vtd_interrupt_limit = 256,
.iommu_units = {
{
.type = JAILHOUSE_IOMMU_INTEL,
.base = 0xfed90000,
.size = 0x1000,
},
{
.type = JAILHOUSE_IOMMU_INTEL,
.base = 0xfed91000,
.size = 0x1000,
},
},
},
},
.root_cell = {
.name = "RootCell",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pio_regions = ARRAY_SIZE(config.pio_regions),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.num_pci_caps = ARRAY_SIZE(config.pci_caps),
},
},
.cpus = {
0xff,
},
.mem_regions = {
{
.phys_start = 0x3f0f0000,
.virt_start = 0x3f0f0000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ,
},
{
.phys_start = 0x3f0f1000,
.virt_start = 0x3f0f1000,
.size = 0x9000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
{
.phys_start = 0x3f0fa000,
.virt_start = 0x3f0fa000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
{
.phys_start = 0x3f0fc000,
.virt_start = 0x3f0fc000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ,
},
{
.phys_start = 0x3f0fe000,
.virt_start = 0x3f0fe000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ,
},
/* IVSHMEM shared memory regions (networking) */
JAILHOUSE_SHMEM_NET_REGIONS(0x3f100000, 0),
/* MemRegion: 00000000-0005efff : System RAM */
{
.phys_start = 0x0,
.virt_start = 0x0,
.size = 0x5f000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 00060000-0009ffff : System RAM */
{
.phys_start = 0x60000,
.virt_start = 0x60000,
.size = 0x40000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 00100000-01ffffff : System RAM */
{
.phys_start = 0x100000,
.virt_start = 0x100000,
.size = 0x1f00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 02000000-03ffffff : Kernel */
{
.phys_start = 0x2000000,
.virt_start = 0x2000000,
.size = 0x2000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 04000000-39ffffff : System RAM */
{
.phys_start = 0x4000000,
.virt_start = 0x4000000,
.size = 0x36000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 3f200000-3fffffff : System RAM */
{
.phys_start = 0x3f200000,
.virt_start = 0x3f200000,
.size = 0xe00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 40400000-62580fff : System RAM */
{
.phys_start = 0x40400000,
.virt_start = 0x40400000,
.size = 0x22181000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 62581000-62581fff : ACPI Non-volatile Storage */
{
.phys_start = 0x62581000,
.virt_start = 0x62581000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 62583000-7624dfff : System RAM */
{
.phys_start = 0x62583000,
.virt_start = 0x62583000,
.size = 0x13ccb000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 79078000-790f4fff : ACPI Tables */
{
.phys_start = 0x79078000,
.virt_start = 0x79078000,
.size = 0x7d000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 790f5000-795ccfff : ACPI Non-volatile Storage */
{
.phys_start = 0x790f5000,
.virt_start = 0x790f5000,
.size = 0x4d8000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 7aad7000-7acfefff : Unknown E820 type */
{
.phys_start = 0x7aad7000,
.virt_start = 0x7aad7000,
.size = 0x228000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 7acff000-7acfffff : System RAM */
{
.phys_start = 0x7acff000,
.virt_start = 0x7acff000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 7f800000-7f800fff : 0000:00:15.0 */
{
.phys_start = 0x7f800000,
.virt_start = 0x7f800000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 80000000-80e0ffff : efifb */
{
.phys_start = 0x80000000,
.virt_start = 0x80000000,
.size = 0xe10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 90000000-9fffffff : 0000:01:00.0 */
{
.phys_start = 0x90000000,
.virt_start = 0x90000000,
.size = 0x10000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a0000000-a1ffffff : 0000:01:00.0 */
{
.phys_start = 0xa0000000,
.virt_start = 0xa0000000,
.size = 0x2000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a2000000-a2ffffff : 0000:00:02.0 */
{
.phys_start = 0xa2000000,
.virt_start = 0xa2000000,
.size = 0x1000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a3000000-a3ffffff : 0000:01:00.0 */
{
.phys_start = 0xa3000000,
.virt_start = 0xa3000000,
.size = 0x1000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a4000000-a407ffff : 0000:01:00.0 */
{
.phys_start = 0xa4000000,
.virt_start = 0xa4000000,
.size = 0x80000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a4080000-a4083fff : 0000:01:00.1 */
{
.phys_start = 0xa4080000,
.virt_start = 0xa4080000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a4100000-a41fffff : 0000:00:1f.3 */
{
.phys_start = 0xa4100000,
.virt_start = 0xa4100000,
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a4200000-a4201fff : 0000:02:00.0 */
{
.phys_start = 0xa4200000,
.virt_start = 0xa4200000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a4203000-a4203fff : 0000:02:00.0 */
{
.phys_start = 0xa4203000,
.virt_start = 0xa4203000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a4300000-a431ffff : e1000e */
{
.phys_start = 0xa4300000,
.virt_start = 0xa4300000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a4320000-a432ffff : xhci-hcd */
{
.phys_start = 0xa4320000,
.virt_start = 0xa4320000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a4330000-a4333fff : 0000:00:1f.3 */
{
.phys_start = 0xa4330000,
.virt_start = 0xa4330000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a4334000-a4335fff : ahci */
{
.phys_start = 0xa4334000,
.virt_start = 0xa4334000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a4336000-a4337fff : 0000:00:14.2 */
{
.phys_start = 0xa4336000,
.virt_start = 0xa4336000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a4338000-a43380ff : 0000:00:1f.4 */
{
.phys_start = 0xa4338000,
.virt_start = 0xa4338000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a4339000-a43397ff : ahci */
{
.phys_start = 0xa4339000,
.virt_start = 0xa4339000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a433a000-a433a0ff : ahci */
{
.phys_start = 0xa433a000,
.virt_start = 0xa433a000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a433b000-a433bfff : 0000:00:16.0 */
{
.phys_start = 0xa433b000,
.virt_start = 0xa433b000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a433d000-a433dfff : 0000:00:14.2 */
{
.phys_start = 0xa433d000,
.virt_start = 0xa433d000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a433e000-a433efff : 0000:00:12.0 */
{
.phys_start = 0xa433e000,
.virt_start = 0xa433e000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: a433f000-a433ffff : 0000:00:08.0 */
{
.phys_start = 0xa433f000,
.virt_start = 0xa433f000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd000000-fd69ffff : pnp 00:07 */
{
.phys_start = 0xfd000000,
.virt_start = 0xfd000000,
.size = 0x6a0000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd6a0000-fd6affff : INT3450:00 */
{
.phys_start = 0xfd6a0000,
.virt_start = 0xfd6a0000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd6b0000-fd6bffff : INT3450:00 */
{
.phys_start = 0xfd6b0000,
.virt_start = 0xfd6b0000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd6c0000-fd6cffff : pnp 00:07 */
{
.phys_start = 0xfd6c0000,
.virt_start = 0xfd6c0000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd6d0000-fd6dffff : INT3450:00 */
{
.phys_start = 0xfd6d0000,
.virt_start = 0xfd6d0000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd6e0000-fd6effff : INT3450:00 */
{
.phys_start = 0xfd6e0000,
.virt_start = 0xfd6e0000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fd6f0000-fdffffff : pnp 00:07 */
{
.phys_start = 0xfd6f0000,
.virt_start = 0xfd6f0000,
.size = 0x910000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fe200000-fe7fffff : pnp 00:07 */
{
.phys_start = 0xfe200000,
.virt_start = 0xfe200000,
.size = 0x600000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed00000-fed003ff : PNP0103:00 */
{
.phys_start = 0xfed00000,
.virt_start = 0xfed00000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed10000-fed17fff : pnp 00:06 */
{
.phys_start = 0xfed10000,
.virt_start = 0xfed10000,
.size = 0x8000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed18000-fed18fff : pnp 00:06 */
{
.phys_start = 0xfed18000,
.virt_start = 0xfed18000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed19000-fed19fff : pnp 00:06 */
{
.phys_start = 0xfed19000,
.virt_start = 0xfed19000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed20000-fed3ffff : pnp 00:06 */
{
.phys_start = 0xfed20000,
.virt_start = 0xfed20000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed45000-fed8ffff : pnp 00:06 */
{
.phys_start = 0xfed45000,
.virt_start = 0xfed45000,
.size = 0x4b000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 100000000-47c7fffff : System RAM */
{
.phys_start = 0x100000000,
.virt_start = 0x100000000,
.size = 0x37c800000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 47c800000-47fffffff : RAM buffer */
{
.phys_start = 0x47c800000,
.virt_start = 0x47c800000,
.size = 0x3800000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 78f51000-78f70fff : ACPI DMAR RMRR */
/* PCI device: 00:14.0 */
{
.phys_start = 0x78f51000,
.virt_start = 0x78f51000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 7d000000-7f7fffff : ACPI DMAR RMRR */
/* PCI device: 00:02.0 */
{
.phys_start = 0x7d000000,
.virt_start = 0x7d000000,
.size = 0x2800000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 78ff8000-79077fff : ACPI DMAR RMRR */
/* PCI device: 00:16.7 */
{
.phys_start = 0x78ff8000,
.virt_start = 0x78ff8000,
.size = 0x80000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 3a600000-3f1fffff : JAILHOUSE Inmate Memory */
{
.phys_start = 0x3a600000,
.virt_start = 0x3a600000,
.size = 0x4c00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
},
.irqchips = {
/* IOAPIC 2, GSI base 0 */
{
.address = 0xfec00000,
.id = 0x100f7,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
},
.pio_regions = {
/* Port I/O: 0000-001f : dma1 */
/* PIO_RANGE(0x0, 0x20), */
/* Port I/O: 0020-0021 : pic1 */
/* PIO_RANGE(0x20, 0x2), */
/* Port I/O: 0040-0043 : timer0 */
PIO_RANGE(0x40, 0x4),
/* Port I/O: 0050-0053 : timer1 */
/* PIO_RANGE(0x50, 0x4), */
/* Port I/O: 0060-0060 : keyboard */
PIO_RANGE(0x60, 0x1),
PIO_RANGE(0x61, 0x1),//
/* Port I/O: 0064-0064 : keyboard */
PIO_RANGE(0x64, 0x1),
PIO_RANGE(0x70, 0x1),//
PIO_RANGE(0x71, 0x1),//
PIO_RANGE(0x1800, 0x2),//
/* Port I/O: 0080-008f : dma page reg */
/* PIO_RANGE(0x80, 0x10), */
/* Port I/O: 00a0-00a1 : pic2 */
/* PIO_RANGE(0xa0, 0x2), */
/* Port I/O: 00b2-00b2 : APEI ERST */
/* PIO_RANGE(0xb2, 0x1), */
/* Port I/O: 00c0-00df : dma2 */
/* PIO_RANGE(0xc0, 0x20), */
/* Port I/O: 00f0-00f0 : PNP0C04:00 */
/* PIO_RANGE(0xf0, 0x1), */
/* Port I/O: 03f8-03ff : serial */
PIO_RANGE(0x3f8, 0x8),
/* Port I/O: 0400-041f : iTCO_wdt */
/* PIO_RANGE(0x400, 0x20), */
/* Port I/O: 0680-069f : pnp 00:03 */
/* PIO_RANGE(0x680, 0x20), */
/* Port I/O: 0a00-0a3f : pnp 00:01 */
/* PIO_RANGE(0xa00, 0x40), */
/* Port I/O: 0a40-0a7f : pnp 00:01 */
/* PIO_RANGE(0xa40, 0x40), */
/* Port I/O: 3000-307f : 0000:01:00.0 */
PIO_RANGE(0x3000, 0x80),
/* Port I/O: 4000-403f : 0000:00:02.0 */
PIO_RANGE(0x4000, 0x40),
/* Port I/O: 4060-407f : 0000:00:17.0 */
PIO_RANGE(0x4060, 0x20),
/* Port I/O: 4080-4083 : 0000:00:17.0 */
PIO_RANGE(0x4080, 0x4),
/* Port I/O: 4090-4097 : 0000:00:17.0 */
PIO_RANGE(0x4090, 0x8),
/* Port I/O: efa0-efbf : 0000:00:1f.4 */
PIO_RANGE(0xefa0, 0x20),
},
.pci_devices = {
/* lay IVSHMEM: 00:10.0 */
{
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.iommu = 1,
.domain = 0x0,
.bdf = 0x10 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
.num_msix_vectors = 16,
.shmem_regions_start = 0,
.shmem_dev_id = 0,
.shmem_peers = 3,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
},
/* lay IVSHMEM: 00:11.0 */
{
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.iommu = 1,
.domain = 0x0,
.bdf = 0x11 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_MSIX,
.num_msix_vectors = 3,
.shmem_regions_start = 5,
.shmem_dev_id = 0,
.shmem_peers = 2,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
/* PCIDevice: 00:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x0,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 1,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:01.0 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x8,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 1,
.num_caps = 7,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:02.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0x10,
.bar_mask = {
0xff000000, 0xffffffff, 0xf0000000,
0xffffffff, 0xffffffc0, 0x00000000,
},
.caps_start = 8,
.num_caps = 7,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:08.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x40,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 15,
.num_caps = 3,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:12.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x90,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 18,
.num_caps = 2,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:14.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xa0,
.bar_mask = {
0xffff0000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 20,
.num_caps = 3,
.num_msi_vectors = 8,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:14.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xa2,
.bar_mask = {
0xffffe000, 0xffffffff, 0xfffff000,
0xffffffff, 0x00000000, 0x00000000,
},
.caps_start = 23,
.num_caps = 1,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:15.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xa8,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 24,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:16.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xb0,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 26,
.num_caps = 3,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:17.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xb8,
.bar_mask = {
0xffffe000, 0xffffff00, 0xfffffff8,
0xfffffffc, 0xffffffe0, 0xfffff800,
},
.caps_start = 29,
.num_caps = 3,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1b.0 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xd8,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 32,
.num_caps = 10,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xf8,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xfb,
.bar_mask = {
0xffffc000, 0xffffffff, 0x00000000,
0x00000000, 0xfff00000, 0xffffffff,
},
.caps_start = 42,
.num_caps = 3,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.4 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xfc,
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0xffffffe0, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.5 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xfd,
.bar_mask = {
0xfffff000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.6 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xfe,
.bar_mask = {
0xfffe0000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 45,
.num_caps = 2,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 01:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x100,
.bar_mask = {
0xff000000, 0xf0000000, 0xffffffff,
0xfe000000, 0xffffffff, 0xffffff80,
},
.caps_start = 47,
.num_caps = 9,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 01:00.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x101,
.bar_mask = {
0xffffc000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 56,
.num_caps = 4,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 02:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x200,
.bar_mask = {
0xffffc000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 60,
.num_caps = 9,
.num_msi_vectors = 32,
.msi_64bits = 1,
.msi_maskable = 1,
.num_msix_vectors = 32,
.msix_region_size = 0x1000,
.msix_address = 0xa4202000,
},
},
.pci_caps = {
/* PCIDevice: 00:00.0 */
{
.id = PCI_CAP_ID_VNDR,
.start = 0xe0,
.len = 0x2,
.flags = 0,
},
/* PCIDevice: 00:01.0 */
{
.id = PCI_CAP_ID_SSVID,
.start = 0x88,
.len = 0x2,
.flags = 0,
},
{
.id = PCI_CAP_ID_PM,
.start = 0x80,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x90,
.len = 0xa,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_EXP,
.start = 0xa0,
.len = 0x3c,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VC | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0x10,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_RCLD | JAILHOUSE_PCI_EXT_CAP,
.start = 0x140,
.len = 0x4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_SECPCI | JAILHOUSE_PCI_EXT_CAP,
.start = 0xd94,
.len = 0x10,
.flags = 0,
},
/* PCIDevice: 00:02.0 */
{
.id = PCI_CAP_ID_VNDR,
.start = 0x40,
.len = 0x2,
.flags = 0,
},
{
.id = PCI_CAP_ID_EXP,
.start = 0x70,
.len = 0x3c,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0xac,
.len = 0xa,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xd0,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_EXT_CAP_ID_PASID | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0x8,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ATS | JAILHOUSE_PCI_EXT_CAP,
.start = 0x200,
.len = 0x4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_PRI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x300,
.len = 0x4,
.flags = 0,
},
/* PCIDevice: 00:08.0 */
{
.id = PCI_CAP_ID_MSI,
.start = 0x90,
.len = 0xa,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xdc,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_AF,
.start = 0xf0,
.len = 0x2,
.flags = 0,
},
/* PCIDevice: 00:12.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0x50,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 0xa,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 00:14.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0x70,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_VNDR,
.start = 0x90,
.len = 0x2,
.flags = 0,
},
/* PCIDevice: 00:14.2 */
{
.id = PCI_CAP_ID_PM,
.start = 0x80,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 00:15.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0x80,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_VNDR,
.start = 0x90,
.len = 0x2,
.flags = 0,
},
/* PCIDevice: 00:16.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0x50,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x8c,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_VNDR,
.start = 0xa4,
.len = 0x2,
.flags = 0,
},
/* PCIDevice: 00:17.0 */
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 0xa,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_PM,
.start = 0x70,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_SATA,
.start = 0xa8,
.len = 0x2,
.flags = 0,
},
/* PCIDevice: 00:1b.0 */
{
.id = PCI_CAP_ID_EXP,
.start = 0x40,
.len = 0x3c,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 0xa,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_SSVID,
.start = 0x90,
.len = 0x2,
.flags = 0,
},
{
.id = PCI_CAP_ID_PM,
.start = 0xa0,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0x40,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ACS | JAILHOUSE_PCI_EXT_CAP,
.start = 0x140,
.len = 0x8,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_PTM | JAILHOUSE_PCI_EXT_CAP,
.start = 0x150,
.len = 0xc,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_L1SS | JAILHOUSE_PCI_EXT_CAP,
.start = 0x200,
.len = 0x4,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_SECPCI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x220,
.len = 0x10,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_DPC | JAILHOUSE_PCI_EXT_CAP,
.start = 0x250,
.len = 0x4,
.flags = 0,
},
/* PCIDevice: 00:1f.3 */
{
.id = PCI_CAP_ID_PM,
.start = 0x50,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_VNDR,
.start = 0x80,
.len = 0x2,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x60,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 00:1f.6 */
{
.id = PCI_CAP_ID_PM,
.start = 0xc8,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0xd0,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 01:00.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0x60,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x68,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_EXP,
.start = 0x78,
.len = 0x3c,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VC | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0x10,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_LTR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x250,
.len = 0x8,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_PWR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x128,
.len = 0x10,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x420,
.len = 0x40,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VNDR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x600,
.len = 0x28,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_SECPCI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x900,
.len = 0x10,
.flags = 0,
},
/* PCIDevice: 01:00.1 */
{
.id = PCI_CAP_ID_PM,
.start = 0x60,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x68,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_EXP,
.start = 0x78,
.len = 0x3c,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0x40,
.flags = 0,
},
/* PCIDevice: 02:00.0 */
{
.id = PCI_CAP_ID_EXP,
.start = 0x40,
.len = 0x3c,
.flags = 0,
},
{
.id = PCI_CAP_ID_PM,
.start = 0x80,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0x90,
.len = 0x18,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSIX,
.start = 0xb0,
.len = 0xc,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0x40,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_VC | JAILHOUSE_PCI_EXT_CAP,
.start = 0x150,
.len = 0x10,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_LTR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x260,
.len = 0x8,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_SECPCI | JAILHOUSE_PCI_EXT_CAP,
.start = 0x300,
.len = 0x10,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_L1SS | JAILHOUSE_PCI_EXT_CAP,
.start = 0x400,
.len = 0x4,
.flags = 0,
},
},
};