mt7620 u-boot解析

源码地址：https://github.com/cleanwrt/u-boot_mt7620
从mt7620_uboot/cpu/ralink_soc/start.S ：

la  t9, board_init_f 

进入c代码中，相继调用board_init_f和board_init_r， 进入main_loop中。
查看启动信息，找出与打印信息相对应的代码：

U-Boot 1.1.3 (Jul 9 2016 - 11:19:18)

Board: Ralink APSoC DRAM: 128 MB
relocate_code Pointer at: 87fb8000
enable ephy clock...done. rf reg 29 = 5
SSC disabled.
spi_wait_nsec: 29 
spi device id: ef 40 18 0 0 (40180000)
find flash: W25Q128BV
raspi_read: from:30000 len:1000 
raspi_read: from:30000 len:1000 
============================================ 
Ralink UBoot Version: 4.2.1.0
-------------------------------------------- 
ASIC 7620_MP (Port5<->None)
DRAM component: 1024 Mbits DDR, width 16
DRAM bus: 16 bit
Total memory: 128 MBytes
Flash component: SPI Flash
Date:Jul 9 2016 Time:11:19:18
============================================ 
icache: sets:512, ways:4, linesz:32 ,total:65536
dcache: sets:256, ways:4, linesz:32 ,total:32768

##### The CPU freq = 580 MHZ #### 
estimate memory size =128 Mbytes

Please choose the operation: 
1: Load system code to SDRAM via TFTP. 
2: Load system code then write to Flash via TFTP. 
3: Boot system code via Flash (default).
4: Entr boot command line interface.
7: Load Boot Loader code then write to Flash via Serial. 
9: Load Boot Loader code then write to Flash via TFTP. 
2 
You choosed 4

0 
raspi_read: from:40028 len:6


4: System Enter Boot Command Line Interface.

U-Boot 1.1.3 (Jul 9 2016 - 11:19:18)
MT7620 # 

board_init_f 函数分析：

void board_init_f(ulong bootflag)
{
    gd_t gd_data, *id;
    bd_t *bd;  
    //init_fnc_t **init_fnc_ptr;
    ulong addr, addr_sp, len = (ulong)&uboot_end - CFG_MONITOR_BASE;
    ulong *s;
    u32 value;
    u32 fdiv = 0, step = 0, frac = 0, i;

    ......

    timer_init();
    env_init();     /* initialize environment */
    init_baudrate();        /* initialze baudrate settings */
    serial_init();      /* serial communications setup 初始化出口，开始使用串口*/
    console_init_f();
    display_banner();       /* say that we are here 从这里开始输入出口信息，打印u-boot版本*/
    checkboard();  /*这里输出：Board: Ralink APSoC*/      

    init_func_ram(); /*这里输出：DRAM: 和打印的DRAM的值*/

    ......

#if defined(CFG_RUN_CODE_IN_RAM)
    /* 
     * tricky: relocate code to original TEXT_BASE
     * for ICE souce level debuggind mode   
     * 这里执行 “relocate_code Pointer at: 87fb8000”
     */ 
    debug ("relocate_code Pointer at: %08lx\n", addr);
    relocate_code (addr_sp, id, /*TEXT_BASE*/ addr);    
#else
    debug ("relocate_code Pointer at: %08lx\n", addr);
    relocate_code (addr_sp, id, addr);
#endif

    /* NOTREACHED - relocate_code() does not return */
}

开始转入board_init_r函数：

void board_init_r (gd_t *id, ulong dest_addr)
{
    cmd_tbl_t *cmdtp;
    ulong size;
    extern void malloc_bin_reloc (void);
#ifndef CFG_ENV_IS_NOWHERE
    extern char * env_name_spec;
#endif
    char *s, *e;
    bd_t *bd;
    int i;
    int timer1= CONFIG_BOOTDELAY;
    unsigned char BootType='3', confirm=0;
    int my_tmp;
    char addr_str[11];
#if defined (CFG_ENV_IS_IN_FLASH)
    ulong e_end;
#endif

     ......

#if defined(MT7620_ASIC_BOARD)
    /* Enable E-PHY clock */ /* TODO: remove printf()*/ 
    /* 这里enable E-phy 时钟，，，*/
    printf("enable ephy clock..."); 
    i = 5;
    rw_rf_reg(1, 29, &i);
    printf("done. ");
    rw_rf_reg(0, 29, &i);
    printf("rf reg 29 = %d\n", i);   /*这里取值*/

    /* print SSC for confirmation */ /* TODO: remove these in formanl release*/ 
    /*这里打印ssc */
    u32 value = RALINK_REG(0xb0000054);
    value = value >> 4;
    if(value & 0x00000008){
        unsigned long swing = ((value & 0x00000007) + 1) * 1250;
        printf("SSC enabled. swing=%d, upperbound=%d\n", swing, (value >> 4) & 0x3);
    }else{
        printf("SSC disabled.\n");
    }

#endif

    .......

/*这里开始找到flash设备，并进行初始化*/
#if defined (CFG_ENV_IS_IN_NAND)
#if defined (MT7621_ASIC_BOARD) || defined (MT7621_FPGA_BOARD)
    if ((size = mtk_nand_probe()) != (ulong)