matlab可以转换为vhdl,怎么从.c转换.m文件到.vhdl文件或.vhdl文件

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I take it you've never written anything in VHDL before, is that correct?

Adrian

Please google your question before asking it.

If someone answers your question, mark the post with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left).

2019-3-18 13:27:38

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Respected Adrian,

Thanks for your reply.Actually my project is comparison of fingerprint images for ATM accessing.In my project i want to do comparison of two images using MATLAB and then convert that .m file to .vhdl file from that i want to generate .bit file to run on FPGA or .hex file to run on ARM .I enquired about the conversion possibilities,someone is saying that it is possible by using mbox tool in xilinx but some one are saying that it is confined to some functions in matlab.so,that i want to confirm about its possibilities of conversion.Please, let me know as early as possible.I am also attaching my project base paper.

Thanks&Regards,

R.V.L.Ganesh

jishu_1743010_1_1.html            ATM terminal design is based on fingerprint recognition_05486288.pdf ‏406 KB

2019-3-18 13:40:35

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Ganesh,

On behalf of my twin brother Adrian (with whom I was separated at birth), please consider answering Adrian's question:

I take it you've never written anything in VHDL before, is that correct?- Bob Elkind

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2019-3-18 14:00:27

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Hi Ganesh,

there are two ways that lead from Matlab to FPGAs.

One is the HDL-Coder Toolbox. The other one is Xilinx System Generator.

Both have their pros and cons and yes, there are limitations.

You can't just convert any code. It has to comply with some strict rules and restrictions.

Similar things apply for C-Synthesis tools.

Which is no wonder, when you take in account that even VHDL itself can only use a subset of itself for synthesis.

The point is that you are going to design hardware, wich differs greatly from software.

If you have an algorithm working nicely as software, there is a good chance that an identical approach of a hardware implementation fails badly.

And while all of these tools may be quite nice for algorithmic stuff (if you know how to handle them) they behave clumsy when you are going to design the interfaces to the outer world of the FPGA.

Have a nice synthesis

Eilert

2019-3-18 14:08:27

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Hi Eilert,

Thanks for your support.I will go through the process and if any queries i will confirm with you.If you dont mind can i get  the screen shots of the conversion process.

Thanks&Regards,

R.V.L.Ganesh

2019-3-18 14:21:56

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Hi Ganesh,

If further questions on specific details come up, just post them or write me a message.

About the screenshots: Well, there's nothing much to see on the screen but progress bars.

Also I only have access to Xilinx sysgen. The other tools, I know about but don't have them installed.

Have a nice synthesis

Eilert

2019-3-18 14:32:34

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Hi Eilert,

Thanks for spending your valuable time.I will go through the process.

Thanks&Regards,

R.V.L.Ganesh

2019-3-18 14:40:11

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rvlganesh wrote:

Hi Eilert,

Thanks for your support.I will go through the process and if any queries i will confirm with you.If you dont mind can i get  the screen shots of the conversion process.

Thanks&Regards,

R.V.L.Ganesh

Since you refuse to answers Adrian's question, we can only assume that you've never done anything at all with VHDL or FPGAs.

Good luck. You'll need it.

----------------------------Yes, I do this for a living.

2019-3-18 14:46:12

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Hi Eilert sir,

my M.tech project is Face recognition on virtex5, i want help for the my algorithm part, My algorithm is Haar classifier (viola jones algorithm). i dont know how to start the my algorithm part.

then my project is the video processing based, so i dont know how to give pixel value in Input, that is i dont know how to convert the video file into TXT file.

then how to give pixel value's in RAM ?

Then I was finished my simulation part in MATLAB, so how to convert the .m file to .v file(like verilog file) ?

there r two way to convert the HDL file

1)  Simulink HDL coder

2)  AccelDSP Synthesis Tool or ACCELDSP Software tool

I dont know about ACCELDSP software, so plz give me the procedure for that software

help me

Thank you,

by,

Mano.H

2019-3-18 15:04:02

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Sir, My project is Face recognition on FPGA virtex% kit,

Then I was finished my simulation part in MATLAB, so how to convert the .m file to .v file(like verilog file) ?

there r two way to convert the HDL file

1)  Simulink HDL coder

2)  AccelDSP Synthesis Tool or ACCELDSP Software tool

I dont know about ACCELDSP software, so plz give me the procedure for that software..

thank you

2019-3-18 15:12:43

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Hi guys,I am working on Video Compression , I done compression in MATLAB. Now i want to convert that .m file to hdl file or .c file.How it is possible.let me know

2019-3-18 15:26:15

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