USBDM RS08/HCS08/HCS12/Coldfire V1,2,3,4/DSC/Kinetis Debugger and Programmer -- MC9S08JS16-CSDN博客

Introduction

The attached files provide a port of a combined TBDML/OSBDM code to a MC9S08JS16 processor.
The primary motivation for this was to produce a single BDM that could be used with a range of Freescale microcontrollers. Additional software features have also been added.
This implementation has minimal features to simplify construction and does not require a BDM for initial programming.
An alternative version is provided that adds an ARM SWD interface that supports Freescale Kinetis devices.

Quick Links

Features

This version of the code & extended hardware provides the following features:

A single BDM interface for programming and debugging of the following targets:
- HCS12 (including those without SYNC feature (e.g. 9S12DP256B)
- HCS08
- Coldfire V1
- Kinetis (via SWD interface on selected versions)
No re-flashing of the BDM is required when changing between targets
Compatible IDEs
- Codewarrior V10.1/2 (Eclipse version)
  - Tested on Windows-XP-32bit, Windows-7-32bit, Windows-7-64bit
  - Tested on Ubuntu-32-bit
- Codewarrior Legacy versions
- Codewarrior Development Studio for HCS12(X) V5.1 &
  CW for Microcontrollers V6.3 (RS08 is not supported)
  - Tested on Windows-XP-32bit, Windows-Vista-32bit
- Initial support for CodeSourcery Lite for Coldfire
  - Tested on Windows-XP-32bit
Trimming of target internal clock (Eclipse version or standalone programming tools only).
Higher USB communication speed cf. JB16 version BDMs (USB full speed cf. USB low speed)
Vista compatible
Linux compatible
Initial Firmware programming may be done without a BDM using the JS16 USB bootloader ROM.
The Firmware in the BDM may be automatically updated using an in-circuit-programming (ICP) feature.
Hardware is physically small
HCS12, HCS08, Coldfire V1 specific features:
Target reset detection & control (required for HC12 processors). This allows HC12 processors to be reset into BDM mode as required for debugging.
- A higher BDM interface speed than the existing JB16 OSBDMs. Up to 56MHz. (BDM clock 28MHz).
- Automatic re-connection. The software has an option to continuously update the interface speed to prevent loss of communication if the target BDM interface speed changes (as may occur with clock changes on some targets).
- Control of BDM clock selection in HC12/HCS08/Coldfire microcontrollers. Most of these targets provide an alternative BDM clock selection. This can have advantages when connecting to high speed targets as the alternative clock may operate at a lower speed.
- Trial-and-error determination of communication speed for earlier HC12 targets.
- User prompting for target supply cycling with BKGD low as may be needed for HCS08 targets

Pictures (USBDM_JS16_SWD - HCS08/HCS12/CFV1/ARM-SWD)

USBDM Minimal HCS08/HCS12/CFV1 & SWD interfaces

USBDM HCS08/HCS12/CFV1, SWD & Serial interfaces with manual target power.

Hardware Design

Please refer to the following PDF documents for Schematics, Assembly Overlays & Bill of Materials:

Differences to JB16 TBDML/OSBDM

The PCB artwork provided is for a double-sided plated-through-hole board using surface mount components. This seems a reasonable decision since the processor is only available in a SMT package in any case. It is quite possible to prototype the the first and third designs using a non-PTH board as the required vias have not been located beneath components and may be replaced with feed through wires.
The above images are for a milled board that was hand assembled.

Credits

The original base code is taken from the TBDML, OSBDM and TBLCF projects and I very much appreciate the effort involved in producing the original code. I hope this extension will be useful.
The hardware interface is based on TBDML, Freescale USBSPYDER08 and my own invention.