【电路】pmic芯片设计细节

最新推荐文章于 2024-10-05 18:43:13 发布

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最新推荐文章于 2024-10-05 18:43:13 发布

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原文链接：http://www.cnblogs.com/kevinchase/p/9946108.html

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VIO_IN供电

　　https://e2e.ti.com/support/power-management/f/196/t/712146?tisearch=e2e-sitesearch&keymatch=tps65916

Note that every GPIO will be configured as an input for the first 6ms after VCC is supplied, which is the time it takes for the device to initalize based on OTP settings. Therefore it's not recommended to pull up any GPIO to a signal which is active during this time, such as VRTC or an always-on VIO signal.
For example, GPIO_0 is commonly used as an enable for a 3.3V load switch. If you want it to be at 1.8V, it is recommended to pull GPIO_0 up to VDDS18V (SMPS4) instead of LDOVRTC, so that the 3.3V switch does not get activated when VCC is supplied.

转载于:https://www.cnblogs.com/kevinchase/p/9946108.html