1. 在/arch/arm/mach-omap2/board-generic.c中,定义了相关初始化函数
:
#ifdef CONFIG_SOC_AM33XX
static const char *am33xx_boards_compat[] __initconst = {
"ti,am33xx",
NULL,
};
DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
.reserve = am33xx_reserve,
.map_io = am33xx_map_io,
.init_early = am33xx_init_early,
.init_irq = omap_intc_of_init,
.handle_irq = omap3_intc_handle_irq,
.init_machine = omap_generic_init,
.init_late = am33xx_init_late,
.init_time = omap3_gptimer_timer_init,
.dt_compat = am33xx_boards_compat,
.restart = am33xx_restart,
MACHINE_END
#endif
static void __init omap_generic_init(void)
{
pdata_quirks_init(omap_dt_match_table);
omapdss_init_of();
}
2. io.c:
#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
void __init am33xx_map_io(void)
{
iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
am33xx_dram_sync_init();
}
#endif
#ifdef CONFIG_SOC_AM33XX
void __init am33xx_init_early(void)
{
omap2_set_globals_tap(AM335X_CLASS,
AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
NULL);
omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
omap3xxx_check_revision();
am33xx_check_features();
am33xx_powerdomains_init();
am33xx_clockdomains_init();
am33xx_hwmod_init();
omap_hwmod_init_postsetup();
omap_clk_soc_init = am33xx_dt_clk_init;
}
void __init am33xx_init_late(void)
{
am33xx_opp_init();
omap_common_late_init();
am33xx_pm_init();
}
#endif
3. irq.c
void __init omap_intc_of_init(void)
{
of_irq_init(irq_match);
}
asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs)
{
void __iomem *base_addr = OMAP3_IRQ_BASE;
omap_intc_handle_irq(base_addr, regs);
}
4. extern void omap3_gptimer_timer_init(void);左其它目录中定义
extern void omap3_gptimer_timer_init(void);
5. am33xx-restart.c
void am33xx_restart(enum reboot_mode mode, const char *cmd)
{
/* TODO: Handle mode and cmd if necessary */
am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
AM33XX_RST_GLOBAL_WARM_SW_MASK,
AM33XX_PRM_DEVICE_MOD,
AM33XX_PRM_RSTCTRL_OFFSET);
/* OCP barrier */
(void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
AM33XX_PRM_RSTCTRL_OFFSET);
}