b halt 汇编_mini2440汇编实例--mmu

head.S

.text .global _start _start: ldr sp, =4096 bl disable_watch_dog bl memsetup bl copy_2th_to_sdram bl create_page_table bl mmu_init ldr sp, =0xB4000000 ldr pc, =0xB0004000 halt_loop: b halt_loop

init.S

.equ WTCON, 0x53000000 .equ MEM_CTL_BASE, 0x48000000 .align 4 mem_cfg_value: .long 0x22011110 //BWSCON .long 0x00000700 //BANKCON0 .long 0x00000700 //BANKCON1 .long 0x00000700 //BANKCON2 .long 0x00000700 //BANKCON3 .long 0x00000700 //BANKCON4 .long 0x00000700 //BANKCON5 .long 0x00018005 //BANKCON6 .long 0x00018005 //BANKCON7 .long 0x008C07A3 //REFRESH .long 0x000000B1 //BANKSIZE .long 0x00000030 //MRSRB6 .long 0x00000030 //MRSRB7 #define MMU_TLB_BASE 0x30000000 #define MMU_FULL_ACCESS (3 << 10) #define MMU_DOMAIN (0 << 5) #define MMU_SPECIAL (1 << 4) #define MMU_CACHEABLE (1 << 3) #define MMU_BUFFERABLE (1 << 2) #define MMU_SECTION (2) #define MMU_SECDESC (MMU_FULL_ACCESS | MMU_DOMAIN | MMU_SPECIAL | / MMU_SECTION) #define MMU_SECDESC_WB (MMU_FULL_ACCESS | MMU_DOMAIN | MMU_SPECIAL | / MMU_CACHEABLE | MMU_BUFFERABLE | MMU_SECTION) #define MMU_SECTION_SIZE 0x00100000 .global disable_watch_dog .global memsetup .global copy_2th_to_sdram .global create_page_table .global mmu_init disable_watch_dog: ldr r1, =WTCON mov r2, #0x00000000 str r2, [r1] mov pc, lr memsetup: ldr r1, =MEM_CTL_BASE adrl r2, mem_cfg_value mov r3, #13 1: ldr r4, [r2], #4 //r4 = [r2], r2 += 4 str r4, [r1], #4 //[r1] = r4, r1 += 4 sub r3, r3, #1 //r3 -= 1 cmp r3, #0x0 bne 1b mov pc, lr copy_2th_to_sdram: ldr r1, =2048 ldr r2, =0x30004000 ldr r3, =4096 1: ldr r4, [r1], #4 //r4 = [r1], r1 += 4 str r4, [r2], #4 //[r2] = r4, r2 += 4 cmp r1, r3 bne 1b mov pc, lr create_page_table: //0 --> 0 mov r1, #MMU_TLB_BASE ldr r2, =MMU_SECDESC_WB str r2, [r1] //0x56000000+1M-1 --> 0xA0000000+1M-1 ldr r3, =(0xA0000000 >> 20) ldr r2, =((0x56000000 & 0xFFF00000) | MMU_SECDESC) str r2, [r1, r3, lsl #2] //0x30000000~0x33FFFFFF --> 0xB0000000~0xB3FFFFFF mov r2, #0xB0000000 mov r3, #0x30000000 1: mov r4, r3 orr r4, r4, #0xC10 add r4, r4, #0x0e //r4 = (r3 & 0xFFF00000) | MMU_SECDESC_WB mov r3, r2, lsr #20 //r3 = r2 >> 20 str r4, [r1, r3, lsl #2] //[r1 + r3 << 2] = r4 add r2, r2, #0x100000 add r3, r3, #0x100000 cmp r2, #0xB4000000 bls 1b mov pc, lr mmu_init: mov r0, #0 mcr p15, 0, r0, c7, c7, 0 //disable ICaches and DCaches mcr p15, 0, r0, c7, c10, 4 mcr p15, 0, r0, c8, c7, 0 mov r4, #MMU_TLB_BASE mcr p15, 0, r4, c2, c0, 0 //tlb base mvn r0, #0 mcr p15, 0, r0, c3, c0, 0 mrc p15, 0, r0, c1, c0, 0 //read bic r0, r0, #0x3000 bic r0, r0, #0x0300 bic r0, r0, #0x0087 orr r0, r0, #0x0002 orr r0, r0, #0x0004 orr r0, r0, #0x1000 orr r0, r0, #0x0001 mcr p15, 0, r0, c1, c0, 0 mov pc, lr

这里需要注意的是MMU通过Translation base和table index(即MVA的高12位)找到段描述符，从而找到物理地址，Translation base占[31:14]，table index占[13:2]，后两位是0，所以就有了str  r4,  [r1, r3, lsl #2]这种写法，其中r4为段描述符，r1为translation base，r3位MVA的高12位，而C语言里的写法是这样的 *(ttb_base + (virtaladdr >> 20)) = (physicaladdr & 0xFFF00000) | SEC，这里表面上看不到左移两位的操作，其实已经包含了移位的操作，ttb_base是unsigned long类型的，这样一个指针移动1个位置就是4个字节，就相当于左移了2位，*(ttb_base + 1)就相当于(unsigned char*)ttb_base + 1 << 2