matlab实训小结
一、实训小结 为期一个星期的 MATLAB 实训已经结束,虽然时间很短,但我还是从中学到了很多,对 MATLAB 有了一定的了解。Matlab 是一个基于矩阵运算的软件,它的运算功能非常强大,编程效率高,强大而智能化的作业图功能,可扩展性强,simulink 动态仿真功能,主要用于仿真、验证、算法思想是否正确。在这段时间里,我们主要学习 MATLAB 的工具的使用,熟悉其最基础的功能,锻炼了我的实际动手能力。Help 是MATLAB 中最有效的命令。遇到问题,通常都可以借助 help 解决问题。老师一再给我们强调了 help 的重要性。下面是我对 help 的一些常用方法的总结:(1) 命令窗口直接敲“help”,你就可以得到本地机器上 matlab 的基本的帮助信息。(2)对于某些不是很明确的命令,只知道大体所属范围,譬如说某个工具箱,直接在命令窗口中敲入 help toolboxname,一帮可以得到本工具箱有关的信息:版本号,函数名等。(3)知道函数名,直接用 help funname 就可以得到相应的帮助信息。我觉得想要学好 MATLAB 是不容易的,这是一件需要持之以恒的事,必须要坚持不懈的学习,还需要敢于开口向别人请教,更需要我们勤于思考,勤于记忆,勤于动手。程序设计是实践性和操作性很强的事情,需要我们亲自动手。因此,我们应该经常自己动手实际操作设计程序,熟悉 MATLAB 的操作,这对提高我们的操作能力非常有效。在这几天时间里,我仅仅是学了一点点皮毛,想要进一步的学习,还需要我在以后的的实际运用里不断地学习,改进自己的不足之处,让自己能够有所进步,有所成长。2、资料翻译英文部分:Time Series ArraysA time series is an ordered set of observations stored in a MATLAB array. The rows of the array correspond to time-tagged indices, or observations, and the columns correspond to sample paths, independent realizations, or individual time series. In any given column, the first row contains the oldest observation and the last row contains the most recent observation. In this representation, a time series array is column-oriented.Note Some Econometrics Toolbox functions can process univariate time series arrays atted as either row or column vectors. However, many functions now strictly enforce the column-oriented representation of a time series. To avoid ambiguity, at single realizations of univariate time series as column vectors. Representing a time series in column-oriented at avoids misinterpretation of the arguments. It also makes it easier for you to display data in the MATLAB Command Window.Conditional vs. Unconditional VarianceThe term conditional implies explicit dependence on a past sequence of observations. The term unconditional applies more to long-term behavior of a time series, and assumes no explicit knowledge of the past. Time series typically modeled by Econometrics Toolbox software have constant means and unconditional variances but non-constant conditional variances .Automated HDL Code GenerationHardware description language (HDL) code generation accelerates the development of application-specific integrated circuit (ASIC) and field programmable gate array (FPGA) designs and bridges the gap between system-level design and hardware development.Traditionally, system designers and hardware developers use HDLs, such as very high speed integrated circuit (VHSIC) hardware description language (VHDL) and Verilog, to develop hardware designs. Although HDLs provide a proven for hardware design, the task of coding filter designs, and hardware designs in general, is labor intensive and the use of these languages for algorithm and system-level design is not optimal. Users of the Filter Design HDL Coder™ product can spend more time on fine-tuning algorithms and models through rapid prototyping and experimentation and less time on HDL coding. Architects and designers can efficiently design, analyze, simulate