codewarrior烧录_codewarrior烧写u-boot到nor(1)

这里的烧写方法是一次次尝试出来的，也是加强一下自己对p1020启动流程的理解吧。

注意：烧写时，sw1拨位为0111，启动时拨位应该为0000

使用codewarrior来烧写.

创建SRAM程序，debug测试一下

创建flash programmer

打开flash file to target

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检查以下选项

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点击connection的edit

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检查initialization和memory的tcl和mem

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附烧录的tcl文件,我是将flash映射的地址改成了0xF8000000,其他基本没变

########################################################################################

# Initialization file for P1020RDB-PD board - SRAM

# Clock Configuration:

# CPU0: 800 MHz, CPU1:800 MHz, CCB: 400 MHz,

# DDR: 667 MHz, SYSCLK: 100 MHz

########################################################################################

variable CCSRBAR 0xff700000

proc CCSR {reg_off} {

global CCSRBAR

return p:0x[format %x [expr {$CCSRBAR + $reg_off}]]

}

proc apply_e500v2_workaround {} {

# After reset, e500 cores need to run before being able to enter debug mode.

# Work-around: set a HW BP at reset address and run the core; after the core hits the BP, it enters debug mode

# e500 cores need to have valid opcode at the interrupt vector

variable SPR_GROUP "e500 Special Purpose Registers/"

#######################################################################

# Set a breakpoint at the reset address

reg ${SPR_GROUP}IAC1 = 0xfffffffc

reg ${SPR_GROUP}DBCR0 = 0x40800000

reg ${SPR_GROUP}DBCR1 = 0x00000000

# Run the core

config runcontrolsync off

go

wait 50

config runcontrolsync on

stop

# Clear affected registers

# Claer TRAP,IAC1,IAC2,DAC1R,DAC1W,DAC2R,DAC2W debug events label

reg ${SPR_GROUP}DBSR = 0x01CF0000

# Internal debug mode(IDM=1),TRAP=1

reg ${SPR_GROUP}DBCR0 = 0x41000000

# Instruction Address Compare with 0x0

reg ${SPR_GROUP}IAC1 = 0x00000000

reg ${SPR_GROUP}CSRR0 = 0x00000000

reg ${SPR_GROUP}CSRR1 = 0x00000000

}

proc init_board {} {

global CCSRBAR

# bits 4-7 - ROM_LOC

# 1000 Local bus FCM 8-bit NAND flash small page

# 1010 Local bus FCM 8-bit NAND flash large page

# 1101 Local bus GPCM 8-bit ROM

# 1110 Local bus GPCM 16-bit ROM

# 1111 Local bus GPCM 16-bit ROM (default)

# using PORBMSR registers from Global Utilities

variable ROM_LOC 0x[format %x [expr {[mem [CCSR 0xe0004] -np] & 0x0f000000}]]

variable FCM_SMALL_PAGE_BOOT_LOC "0x08000000"

variable FCM_LARGE_PAGE_BOOT_LOC "0x0A000000"

variable GPCM_8BIT_BOOT_LOC "0x0D000000"

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