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目录
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- 5 Power States
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- Chapter 6 Power Control Framework
- Chapter 7 System Power Control Integration
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- 7.1 Clock Control Integration
- 7.2 Power Control Integration
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- 7.2.1 Power Domain Wake Events
- 7.2.2 Hardware Abstraction with Power Policy Units
- 7.2.3 Distributed PPUs
- 7.2.4 System of Systems
- 7.2.5 Component Integration Layer
- 7.2.6 Voltage and Power-Gated Domain Clock Gating
- 7.2.7 Voltage and Power Domain Boundaries
- 7.2.8 Access Control
- 7.2.9 Isolation and Reset Control Considerations
- 7.3 Reset Control Integration
- Chapter 8 Component Design Considerations
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