pcie读写ddr_（LINUX）S04-CH03 PCIE 读写BAR地址和DDR

void MainWindow::on_TestDDR_clicked()

{

unsigned char buf1[4096];

unsigned char buf2[4096];

unsigned int i=0;

unsigned int error_cnt =0;

for(i=0;i<4096;i++)

{

buf1[i]=i;

}

put_data_to_fpga_ddr(FPGA_AXI_START_ADDR,buf1,4096);

get_data_from_fpga_ddr(FPGA_AXI_START_ADDR,buf2,4096);

for(i=0;i<4096;i++)

{

if(buf1[i]!=buf2[i])

error_cnt++;

}

if(error_cnt)

{

m_ddrpass++;

QString str  =  QString("%1 %2").arg("AXI bad data = ").arg(error_cnt);

ui->labelDDRPASS->setText(str);

}

else

{

m_ddrpass++;

QString str  =  QString("%1 %2").arg("AXI PASS Times = ").arg(m_ddrpass);<