找了好久今天找到了,记录一下:
&dwc3_0 {
...
phys = ;
...
}
Required properties (port (child) nodes):
lane0:
- #phy-cells : Should be 4
Cell after port phandle is device type from:
-
-
-
-
-
lane1:
- #phy-cells : Should be 4
Cell after port phandle is device type from:
-
-
-
-
-
lane2:
- #phy-cells : Should be 4
Cell after port phandle is device type from:
-
-
-
-
-
lane3:
- #phy-cells : Should be 4
Cell after port phandle is device type from:
-
-
-
-
-
Specifying phy control of devices
=================================
Device nodes should specify the configuration required in their "phys"
property, containing a phandle to the phy port node and a device type.
phys = ;
PHANDLE = &lane0 or &lane1 or &lane2 or &lane3
CONTROLLER_TYPE = PHY_TYPE_PCIE or PHY_TYPE_SATA or PHY_TYPE_USB
or PHY_TYPE_DP or PHY_TYPE_SGMII
CONTROLLER_INSTANCE = Depends on controller type used, can be any of
PHY_TYPE_PCIE : 0 or 1 or 2 or 3
PHY_TYPE_SATA : 0 or 1
PHY_TYPE_USB : 0 or 1
PHY_TYPE_DP : 0 or 1
PHY_TYPE_SGMII: 0 or 1 or 2 or 3
LANE_NUM = Depends on which lane clock is used as ref clk, can be
0 or 1 or 2 or 3
LANE_FREQ = Frequency that controller can operate, can be any of
19.2Mhz,20Mhz,24Mhz,26Mhz,27Mhz,28.4Mhz,40Mhz,52Mhz,
100Mhz,108Mhz,125Mhz,135Mhz,150Mhz
顺便告诉大家去哪里找其他的设备树上的参数含义:
linux-xlnx-xilinx-v201x.x/Documentation/devicetree/bindings/*** 源码下,明白了吗?