arm, 任务调度，上下文切换，硬件软件

1.hardware

1.1.The ARM architecture is a Reduced Instruction Set Computer (RISC) architecture with the following RISC architecture features:

• A large uniform register file.

• A load/store architecture, where data-processing operations only operate on register contents,not directly on memory contents.

• Simple addressing modes, with all load/store addresses determined from register contents and instruction fields only.

Byte8 bits. Halfword 16 bits. Word 32 bits. Doubleword 64 bits. Quadword 128 bits.

1.2.D1.21.1 Implication of Exception levels implemented[1]

armv8的excepiton level: EL0,EL1,EL2,EL3与armv7的其中工作模式：usr,FIQ,IRQ,svc,abt,sys,und的区别？

1.对于ARM架构，主要3部分：CPU，RAM，FLASH；

如何保存恢复寄存器，保存恢复堆栈；

TCB任务控制块，保存进程下上文；

2.arm是哈佛结构还是冯诺依曼结构？

[1]ARM®Architecture Reference Manual ARMv8, for ARMv8-A architecture profile Beta