简易defog

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已于 2024-05-13 18:21:20 修改

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文章标签： fpga开发图像处理人工智能

于 2023-02-16 15:22:20 首次发布

本文链接：https://blog.csdn.net/weixin_43167279/article/details/129062781

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最暗像素获取

rgb_dark


`timescale 1ns / 1ps
module rgb_dark(
       input						    pixelclk,
	   input                            reset_n,

  	   input          [23:0]            i_rgb,
	   input						    i_hsync,
	   input							i_vsync,
	   input							i_de,
	   
       output         [23:0]            o_dark,
	   output							o_hsync,
	   output							o_vsync,                                                                                                  
	   output						    o_de                                                                                               
	   );

	
reg                       hsync_r,hsync_r0;
reg                       vsync_r,vsync_r0;
reg                       de_r,de_r0;
wire [7:0]                r;
wire [7:0]                g;
wire [7:0]                b;
reg  [7:0]                b_r;
reg  [7:0]                dark_r;
reg  [7:0]                dark_r1;
       
always @(posedge pixelclk) begin
  hsync_r <= i_hsync;
  vsync_r <= i_vsync;
  de_r    <= i_de;
  
  hsync_r0 <= hsync_r;
  vsync_r0 <= vsync_r;
  de_r0    <= de_r;
  
  b_r     <= b;
end

assign r        = i_rgb[23:16];
assign g        = i_rgb[15:8];
assign b        = i_rgb[7:0];
                
assign o_hsync  = hsync_r0;
assign o_vsync  = vsync_r0;
assign o_de     = de_r0;
assign o_dark   = {dark_r1,dark_r1,dark_r1};  
//-------------------------------------------------------------
// r g b dark
//-------------------------------------------------------------
always @(posedge pixelclk or negedge reset_n) begin
  if(!reset_n) 
    dark_r<= 8'b0;
  else if(i_de==1'b1) begin
    if(r>g) 
	  dark_r<= g; 
    else
      dark_r<= r; 	
  end
  else
    dark_r<= 8'b0;
end

always @(posedge pixelclk or negedge reset_n) begin
  if(!reset_n) 
    dark_r1<= 8'b0;
  else if(de_r==1'b1) begin
    if(b_r>dark_r) 
	  dark_r1<= dark_r; 
    else
      dark_r1<= b_r; 	
  end
  else
    dark_r1<= 8'b0;
end  

endmodule

透射率图像获取

transmittance-dark


`timescale 1ns / 1ps
module transmittance_dark(
       input						    pixelclk,
	   input                            reset_n,

  	   input          [23:0]            i_rgb,
	   input						    i_hsync,
	   input							i_vsync,
	   input							i_de,
	   output         [7:0]             dark_max,
       output         [23:0]            o_dark,
	   output							o_hsync,
	   output							o_vsync,                                                                                                  
	   output						    o_de                                                                                               
	   );

parameter W0 = 8'd166;//0.65 The multiplication factor is used to retain some fog, and at 1 o'clock, the fog is completely removed.
parameter T0 = 8'd26;//0.1

	
reg                       hsync_r,hsync_r0,hsync_r1;
reg                       vsync_r,vsync_r0,vsync_r1;
reg                       de_r,de_r0,de_r1;
wire  [7:0]               dark_gray;
reg   [7:0]               max_dark;
reg  [7:0]                max_dark_data;
wire                      vsync_pos;//negedge of vsync
wire                      vsync_neg;//negedge of vsync
reg [7:0]                 transmittance_img;
reg [7:0]                 transmittance;
reg [7:0]                 transmittance_result;
       
always @(posedge pixelclk) begin
  hsync_r <= i_hsync;
  vsync_r <= i_vsync;
  de_r    <= i_de;
  
  hsync_r0 <= hsync_r;
  vsync_r0 <= vsync_r;
  de_r0    <= de_r;
  
  hsync_r1 <= hsync_r0;
  vsync_r1 <= vsync_r0;
  de_r1    <= de_r0;
end

assign dark_gray       = i_rgb[23:16];//gray
assign vsync_neg       = ((!i_vsync) & vsync_r)?1'b1:1'b0;
assign vsync_pos      = (i_vsync & (!vsync_r))?1'b1:1'b0;

                
assign o_hsync  = hsync_r1;
assign o_vsync  = vsync_r1;
assign o_de     = de_r1;
assign o_dark   = {transmittance_result,transmittance_result,transmittance_result};  
assign dark_max = max_dark_data;
//-------------------------------------------------------------
// max dark
//-------------------------------------------------------------
always @(posedge pixelclk or negedge reset_n) begin
  if(!reset_n) begin
    max_dark<= 8'b0;
	max_dark_data<= 8'b0;
  end
  else if(vsync_pos==1'b1)
    max_dark <= dark_gray;
  else if(de_r == 1'b1)
    if(dark_gray > max_dark)
	  max_dark<= dark_gray;
	else
	  max_dark <= max_dark;
  else if(vsync_neg == 1'b1) begin
    max_dark_data <= max_dark;
	max_dark<= 8'b0;
  end 
end

//-------------------------------------------------------------
// t1 img
//-------------------------------------------------------------

always @(posedge pixelclk or negedge reset_n) begin
  if(!reset_n) begin
    transmittance_img<=0;
	transmittance <=0;
  end
  else if(max_dark_data>8'd160 && max_dark_data<8'd170) begin
    transmittance<=dark_gray;                     //1
	transmittance_img <= 8'd255 - transmittance;
  end
  else if(max_dark_data>8'd170 && max_dark_data<8'd180) begin
    transmittance<=(dark_gray[7:1]+dark_gray[7:2]+dark_gray[7:3]+dark_gray[7:4]);//0.9375
	transmittance_img <= 8'd255 - transmittance;
  end
  else if(max_dark_data>8'd180 && max_dark_data<8'd190) begin
    transmittance<=(dark_gray[7:1]+dark_gray[7:2]+dark_gray[7:3]);//0.875
	transmittance_img <= 8'd255 - transmittance;
  end
  else if(max_dark_data>8'd190 && max_dark_data<8'd200) begin
    transmittance<=(dark_gray[7:1]+dark_gray[7:2]+dark_gray[7:4]);//0.8125
	transmittance_img <= 8'd255 - transmittance;
  end
  else if(max_dark_data>8'd200 && max_dark_data<8'd210) begin
    transmittance<=(dark_gray[7:1]+dark_gray[7:2]+dark_gray[7:5]);//0.78125
	transmittance_img <= 8'd255 - transmittance;
  end
  else if(max_dark_data>8'd210 && max_dark_data<8'd220) begin
    transmittance<=(dark_gray[7:1]+dark_gray[7:2]);//0.75
	transmittance_img <= 8'd255 - transmittance;
  end
  else if(max_dark_data>8'd220 && max_dark_data<8'd230) begin
    transmittance<=(dark_gray[7:1]+dark_gray[7:3]+dark_gray[7:4]+dark_gray[7:5]);//0.725
	transmittance_img <= 8'd255 - transmittance;
  end
  else if(max_dark_data>8'd230 && max_dark_data<8'd240) begin
    transmittance<=(dark_gray[7:1]+dark_gray[7:3]+dark_gray[7:4]);//0.6875
	transmittance_img <= 8'd255 - transmittance;
  end
  else if(max_dark_data>8'd240) begin
    transmittance<=(dark_gray[7:1]+dark_gray[7:3]+dark_gray[7:6]);//0.65
    //transmittance<=(dark_gray[7:1]+dark_gray[7:5]+dark_gray[7:6]);//0.65
	//transmittance<=(dark_gray[7:1]);//0.65
	//transmittance<=(dark_gray[7:2]+dark_gray[7:3]);//0.65
	transmittance_img <= 8'd255 - transmittance;
  end
  else begin
    transmittance_img<=0;
	transmittance <=0;
  end
end
//-------------------------------------------------------------
// t2 img
//-------------------------------------------------------------
always @(posedge pixelclk or negedge reset_n) begin
  if(!reset_n)
    transmittance_result <=8'b0;
  else if(transmittance_img > T0)
    transmittance_result <=transmittance_img; 
  else
    transmittance_result <=T0; 
end

endmodule

vga_ctl


`timescale 1ns / 1ps
//`define pix_1920_1080
//`define pix_1280_768
`define pix_1280_720
//`define pix_800_600

module vga_ctl
	(
	input			pix_clk,
	input           reset_n,
	input  [23:0]   VGA_RGB,
	output [11:0]   hcount,
	output [11:0]   vcount,
	output          VGA_CLK,
	output [7:0]	VGA_R,
	output [7:0]	VGA_G,
	output [7:0]	VGA_B,
	output			VGA_HS,
	output			VGA_VS,
	output			VGA_DE,
	output          BLK
	);
	
`include "vga_parameter.vh"

reg[11:0]	x_cnt;
reg[11:0]	y_cnt;
reg	        hsync_r;
reg	        hs_de;
reg	        vsync_r;
reg	        vs_de;
assign VGA_CLK = pix_clk;
always @(posedge pix_clk or negedge reset_n)	 //H count	
begin
	if(!reset_n)
	  x_cnt	<=	1;
	else if(x_cnt==H_Total)
	  x_cnt	<=	1;
	else
	  x_cnt	<=	x_cnt+1;
end

always @(posedge pix_clk or negedge reset_n) //H SYNC DE
begin
	if(!reset_n)
	  hsync_r	<=	1'b1;
	else if(x_cnt==1)
	  hsync_r	<=	1'b0;
	else if(x_cnt==H_Sync)
	  hsync_r	<=	1'b1;
	
	if(!reset_n)
	  hs_de	<=	1'b0;
	else if(x_cnt==H_Start)
	  hs_de	<=	1'b1;
	else if(x_cnt==H_End)
	  hs_de	<=	1'b0;
end

always @(posedge pix_clk or negedge reset_n) //V count
begin
	if(!reset_n)
	  y_cnt	<=	1;
	else if(y_cnt==V_Total)
	  y_cnt	<=	1;
	else if(x_cnt==H_Total)
	  y_cnt	<=	y_cnt+1;
end

always @(posedge pix_clk or negedge reset_n) //V SYNC DE
begin
	if(!reset_n)
	  vsync_r	<=	1'b1;
	else if(y_cnt==1)
	  vsync_r	<=	1'b0;
	else if(y_cnt==V_Sync)
	  vsync_r	<=	1'b1;
	
	if(!reset_n)
	  vs_de	<=	1'b0;
	else if(y_cnt==V_Start)
	  vs_de	<=	1'b1;
	else if(y_cnt==V_End)
	  vs_de	<=	1'b0;
end

assign BLK      =   1'b1;
assign VGA_HS	=	hsync_r;
assign VGA_VS	=	vsync_r;
assign VGA_DE	=	hs_de & vs_de;
assign VGA_R	=	(hs_de & vs_de)? VGA_RGB[23:16]:8'h0;//R
assign VGA_G	=	(hs_de & vs_de)? VGA_RGB[15:8]:8'h0; //G
assign VGA_B	=	(hs_de & vs_de)? VGA_RGB[7:0]:8'h0;  //B
assign hcount   =   (hs_de & vs_de)? (x_cnt - H_Start):12'd0;
assign vcount   =   (hs_de & vs_de)? (y_cnt - V_Start):12'd0;
endmodule

defog



`timescale 1ns / 1ps
module defogging(
       input						    pixelclk,
	   input                            reset_n,

  	   input          [23:0]            i_rgb,
	   input          [23:0]            i_transmittance,
	   input          [7:0]             dark_max,
	   input						    i_hsync,
	   input							i_vsync,
	   input							i_de,
	   
       output         [23:0]            o_defogging,
	   output							o_hsync,
	   output							o_vsync,                                                                                                  
	   output						    o_de                                                                                               
	   );
parameter DEVIDER = 255*16;
	   
reg                       hsync_r,hsync_r0;
reg                       vsync_r,vsync_r0;
reg                       de_r,de_r0;
reg         [23:0]        rgb_r0,rgb_r1,rgb_r2,rgb_r3;//delay 4 clock
wire [7:0]                r;
wire [7:0]                g;
wire [7:0]                b;
wire [7:0]                transmittance_gray;
reg [19:0]                r_r;
reg [19:0]                r_g;
reg [19:0]                r_b;

wire                      r_flag;
wire                      g_flag;
wire                      b_flag;

reg [11:0]                mult1;
reg [15:0]                mult2;
reg [15:0]                mult_r;
reg [15:0]                mult_g;
reg [15:0]                mult_b;

assign                    r_flag = (i_de == 1'b1 && mult2>mult_r)?1'b1:1'b0;
assign                    g_flag = (i_de == 1'b1 && mult2>mult_g)?1'b1:1'b0;
assign                    b_flag = (i_de == 1'b1 && mult2>mult_b)?1'b1:1'b0;
      
always @(posedge pixelclk) begin
  hsync_r <= i_hsync;
  vsync_r <= i_vsync;
  de_r    <= i_de;
  
  hsync_r0 <= hsync_r;
  vsync_r0 <= vsync_r;
  de_r0    <= de_r;
  
  rgb_r0 <=i_rgb;
  rgb_r1 <=rgb_r0;
  rgb_r2 <=rgb_r1;
  rgb_r3 <=rgb_r2;
  
end

assign r        = rgb_r3[23:16];
assign g        = rgb_r3[15:8];
assign b        = rgb_r3[7:0];

assign transmittance_gray      = i_transmittance[23:16];//transmittance gray
              
assign o_hsync  = hsync_r0;
assign o_vsync  = vsync_r0;
assign o_de     = de_r0;
assign o_defogging   = {r_r[19:12],r_g[19:12],r_b[19:12]};  

/*
always @(posedge pixelclk or negedge reset_n) begin
  if(!reset_n) begin
   r_r <= 24'b0;
   r_g <= 24'b0;
   r_b <= 24'b0;
  end
  else begin
    r_r <= (r*255-(255-transmittance_gray)*dark_max)*(255/transmittance_gray);
	r_g <= (g*255-(255-transmittance_gray)*dark_max)*(255/transmittance_gray);
	r_b <= (b*255-(255-transmittance_gray)*dark_max)*(255/transmittance_gray);
  end
end
*/

always @(posedge pixelclk or negedge reset_n) begin
  if(!reset_n) begin
   r_r <= 20'b0;
   r_g <= 20'b0;
   r_b <= 20'b0;
   mult1 <= 12'b0;
   mult_r <= 16'b0;
   mult_g <= 16'b0;
   mult_b <= 16'b0;
  end
  else begin
    mult1 <= DEVIDER/transmittance_gray;
	mult2 <= (255-transmittance_gray)*dark_max;
    mult_r <= r*255;
	mult_g <= g*255;
	mult_b <= b*255;
	//r_r <= (mult_r-mult2)*mult1;
    //r_g <= (mult_g-mult2)*mult1;
    //r_b <= (mult_b-mult2)*mult1;
    r_r <= (r_flag == 1'b1)?{r,12'b0}:(mult_r-mult2)*mult1;
    r_g <= (g_flag == 1'b1)?{g,12'b0}:(mult_g-mult2)*mult1;
    r_b <= (b_flag == 1'b1)?{b,12'b0}:(mult_b-mult2)*mult1;
  end
end

endmodule

tb_image

测试文件


`timescale 1ns / 1ps
//`define pix_1920_1080
//`define pix_1280_768
`define pix_1280_720
//`define pix_800_600

`ifdef pix_1920_1080
	`define PERIOD 6.734
	`define PICTURE_LENGTH 1920   //Image width
	`define PICTURE_WIDTH  1080  //Image height
`endif

`ifdef pix_1280_768
	`define PERIOD 12.578
  	`define PICTURE_LENGTH 1280   //Image width
	`define PICTURE_WIDTH  768  //Image height
`endif

`ifdef  pix_1280_720
	`define PERIOD 13.468
  	`define PICTURE_LENGTH 1280   //Image width
	`define PICTURE_WIDTH  720  //Image height
`endif

`ifdef  pix_800_600
	`define PERIOD 25
	`define PICTURE_LENGTH 800   //Image width
	`define PICTURE_WIDTH  600  //Image height
`endif
`define INPUT1 "G:/vivadowork/quwu/an/in/1.bmp"  //input image
`define INPUT2 "G:/vivadowork/quwu/an/in/2.bmp"  //input image
`define INPUT3 "G:/vivadowork/quwu/an/in/3.bmp"  //input image

//dark
`define OUTPUT_FRAME1 "G:/vivadowork/quwu/an/out/result1.bmp" //result image frame1
`define OUTPUT_FRAME2 "G:/vivadowork/quwu/an/out/result2.bmp" //result image frame2
`define OUTPUT_FRAME3 "G:/vivadowork/quwu/an/out/result3.bmp" //result image frame3

//transmittance
`define OUTPUT_FRAME4 "G:/vivadowork/quwu/an/out/result4.bmp" //result image frame4
`define OUTPUT_FRAME5 "G:/vivadowork/quwu/an/out/result5.bmp" //result image frame5
`define OUTPUT_FRAME6 "G:/vivadowork/quwu/an/out/result6.bmp" //result image frame6

//transmittance
`define OUTPUT_FRAME7 "G:/vivadowork/quwu/an/out/result7.bmp" //result image frame7
`define OUTPUT_FRAME8 "G:/vivadowork/quwu/an/out/result8.bmp" //result image frame8
`define OUTPUT_FRAME9 "G:/vivadowork/quwu/an/out/result9.bmp" //result image frame9

`define PICTURE_MIX	(`PICTURE_LENGTH*`PICTURE_WIDTH*3)
`define PICTURE	(`PICTURE_LENGTH*`PICTURE_WIDTH)
`define PICTURE_R (`PICTURE_MIX + `LEN_HEADER)
`define NULL		0
`define LEN_HEADER	54  // 0x33
`define DATA_WIDTH  8
module tb_image();

reg clk;
reg reset_n;

integer 				fileI1,fileI2,fileI3;
integer                 fileO1,fileO2,fileO3,fileO4,fileO5,fileO6,fileO7,fileO8,fileO9;

integer i,k,m,n,h1,h2,h3;
reg	[`DATA_WIDTH-1:0]		FILE_HEADER1[0:`LEN_HEADER-1];//Image 1 Header
reg	[`DATA_WIDTH-1:0]		FILE_HEADER2[0:`LEN_HEADER-1];//Image 2 Header
reg	[`DATA_WIDTH-1:0]		FILE_HEADER3[0:`LEN_HEADER-1];//Image 3 Header

reg	[`DATA_WIDTH-1:0]		readsPictureB1[0:`PICTURE-1]; //Image1-- Blue Color Channel
reg	[`DATA_WIDTH-1:0]		readsPictureG1[0:`PICTURE-1]; //Image1-- Green Color Channel
reg	[`DATA_WIDTH-1:0]		readsPictureR1[0:`PICTURE-1]; //Image1-- Red Color Channel

reg	[`DATA_WIDTH-1:0]		readsPictureB2[0:`PICTURE-1]; //Image2-- Blue Color Channel
reg	[`DATA_WIDTH-1:0]		readsPictureG2[0:`PICTURE-1]; //Image2-- Green Color Channel
reg	[`DATA_WIDTH-1:0]		readsPictureR2[0:`PICTURE-1]; //Image2-- Red Color Channel

reg	[`DATA_WIDTH-1:0]		readsPictureB3[0:`PICTURE-1]; //Image3-- Blue Color Channel
reg	[`DATA_WIDTH-1:0]		readsPictureG3[0:`PICTURE-1]; //Image3-- Green Color Channel
reg	[`DATA_WIDTH-1:0]		readsPictureR3[0:`PICTURE-1]; //Image3-- Red Color Channel

reg  [31:0] 				addr;//Source image address
wire [`DATA_WIDTH-1:0]	  	SOURCE_B;
wire [`DATA_WIDTH-1:0]	  	SOURCE_G;
wire [`DATA_WIDTH-1:0]	  	SOURCE_R;
wire [`DATA_WIDTH*3-1:0]  	SOURCE_RGB;

wire                      	vga_clk;
wire [11:0]               	hcount;
wire [11:0]               	vcount;
wire [`DATA_WIDTH-1:0]	  	VGA_R;
wire [`DATA_WIDTH-1:0]	  	VGA_G;
wire [`DATA_WIDTH-1:0]	  	VGA_B;
wire		              	VGA_HS;
wire	                  	VGA_VS;
wire		              	VGA_DE;
wire                      	BLK;

reg 						VGA_VS_r;
wire frame_done_flag;

reg  [11:0] frame_cnt;
reg init_flag;
reg header_flag;

//Simulation Time Control
initial begin
    // Initialize Inputs
    clk = 0;
    reset_n = 0;
	wait(init_flag == 1'b1);
	$display("> Initial Done");
	reset_n = 1;
	wait(frame_cnt == 12'd7);
	#(`PERIOD*200);
	$display("> Simulate Done");
	$fclose(fileO1);
	$fclose(fileO2);
	$fclose(fileO3);
	$fclose(fileO4);
	$fclose(fileO5);
	$fclose(fileO6);	
	$fclose(fileO7);
	$fclose(fileO8);
	$fclose(fileO9);	
	$stop;	
end

always #(`PERIOD/2)	clk = ~clk;
wire [`DATA_WIDTH*3-1:0] VGA_RGB = {VGA_R,VGA_G,VGA_B};	
wire                     dark_hsync;
wire                     dark_vsync;
wire                     dark_de;
wire [`DATA_WIDTH*3-1:0] dark;	
wire        transmittance_hsync;
wire        transmittance_vsync;
wire        transmittance_de;
wire [`DATA_WIDTH*3-1:0] transmittance;
wire [`DATA_WIDTH-1:0]  dark_max;	
wire        defogging_hsync;
wire        defogging_vsync;
wire        defogging_de;
wire [`DATA_WIDTH*3-1:0] defogging;	 
//Read picture
always @(posedge clk)begin
	if(reset_n ==1'b0) begin
	    init_flag = 1'b0;
		header_flag = 1'b0;
		for (i = 0; i < `PICTURE; i=i+1)begin
			readsPictureB1[i] = 0;
			readsPictureG1[i] = 0;
			readsPictureR1[i] = 0;  //image 1
			
			readsPictureB2[i] = 0;
			readsPictureG2[i] = 0;
			readsPictureR2[i] = 0;  //image 2
			
			readsPictureB3[i] = 0;
			readsPictureG3[i] = 0;
			readsPictureR3[i] = 0;  //image 3
		end
		$display("> Init Successful !");
		fileI1 = $fopen(`INPUT1,"rb");
		fileI2 = $fopen(`INPUT2,"rb");
		fileI3 = $fopen(`INPUT3,"rb");
		if (fileI1 == `NULL || fileI2 == `NULL || fileI3 == `NULL) 
			$display("> FAIL: The file is not exist !!!\n");
		else	           
			$display("> SUCCESS : The file was read successfully.\n");
					
		h1 = $fread(FILE_HEADER1, fileI1, 0, `LEN_HEADER);
		h2 = $fread(FILE_HEADER2, fileI2, 0, `LEN_HEADER);
		h3 = $fread(FILE_HEADER3, fileI3, 0, `LEN_HEADER);
		
		$display("> SUCCESS : The image header was read successfully.\n");
		//Write Image Header
		header_flag = 1'b1;
		
	    fileO1 = $fopen(`OUTPUT_FRAME1,"wb");
		fileO2 = $fopen(`OUTPUT_FRAME2,"wb");
		fileO3 = $fopen(`OUTPUT_FRAME3,"wb");

	    fileO4 = $fopen(`OUTPUT_FRAME4,"wb");
		fileO5 = $fopen(`OUTPUT_FRAME5,"wb");
		fileO6 = $fopen(`OUTPUT_FRAME6,"wb");

	    fileO7 = $fopen(`OUTPUT_FRAME7,"wb");
		fileO8 = $fopen(`OUTPUT_FRAME8,"wb");
		fileO9 = $fopen(`OUTPUT_FRAME9,"wb");			
		
		for(k=0; k<`LEN_HEADER; k=k+1)begin
	   		$fwrite(fileO1, "%c", FILE_HEADER1[k]);//frame 1 header
			$fwrite(fileO2, "%c", FILE_HEADER1[k]);
			$fwrite(fileO3, "%c", FILE_HEADER1[k]);
			
			$fwrite(fileO4, "%c", FILE_HEADER1[k]);//frame 1 header
			$fwrite(fileO5, "%c", FILE_HEADER1[k]);
			$fwrite(fileO6, "%c", FILE_HEADER1[k]);
			
		    $fwrite(fileO7, "%c", FILE_HEADER1[k]);//frame 1 header
			$fwrite(fileO8, "%c", FILE_HEADER1[k]);
			$fwrite(fileO9, "%c", FILE_HEADER1[k]);
	   	end	
		$display("> SUCCESS : The image header was writed successfully.\n");
		
	    for(m=0;m <`PICTURE;m=m+1) begin
			for(n=0;n<3;n=n+1)begin
				if(n== 0)readsPictureB1[m] = $fgetc(fileI1);//b
				if(n== 1)readsPictureG1[m] = $fgetc(fileI1);//g
				if(n== 2)readsPictureR1[m] = $fgetc(fileI1);//r 
				
				if(n== 0)readsPictureB2[m] = $fgetc(fileI2);//b
				if(n== 1)readsPictureG2[m] = $fgetc(fileI2);//g
				if(n== 2)readsPictureR2[m] = $fgetc(fileI2);//r 
				
				if(n== 0)readsPictureB3[m] = $fgetc(fileI3);//b
				if(n== 1)readsPictureG3[m] = $fgetc(fileI3);//g
				if(n== 2)readsPictureR3[m] = $fgetc(fileI3);//r 
     		end	
		end
		$display("> Read b,g,r Successful !");
		init_flag = 1'b1;
		$fclose(fileI1);
		$fclose(fileI2);
		$fclose(fileI3);
	end
  else begin 
    if(frame_cnt == 12'd2)begin
		if(dark_de == 1'b1)          $fwrite(fileO1, "%c%c%c", dark[7:0],dark[15:8],dark[23:16]);//frame 1 b,g,r
		if(transmittance_de == 1'b1) $fwrite(fileO2, "%c%c%c", transmittance[7:0],transmittance[15:8],transmittance[23:16]);
		if(defogging_de == 1'b1)     $fwrite(fileO3, "%c%c%c", defogging[7:0],defogging[15:8],defogging[23:16]);
	end
	
	if(frame_cnt == 12'd4)begin
		if(dark_de == 1'b1)          $fwrite(fileO4, "%c%c%c", dark[7:0],dark[15:8],dark[23:16]);//frame 1 b,g,r
		if(transmittance_de == 1'b1) $fwrite(fileO5, "%c%c%c", transmittance[7:0],transmittance[15:8],transmittance[23:16]);
		if(defogging_de == 1'b1)     $fwrite(fileO6, "%c%c%c", defogging[7:0],defogging[15:8],defogging[23:16]);
	end
	
	if(frame_cnt == 12'd6)begin
		if(dark_de == 1'b1)          $fwrite(fileO7, "%c%c%c", dark[7:0],dark[15:8],dark[23:16]);//frame 1 b,g,r
		if(transmittance_de == 1'b1) $fwrite(fileO8, "%c%c%c", transmittance[7:0],transmittance[15:8],transmittance[23:16]);
		if(defogging_de == 1'b1)     $fwrite(fileO9, "%c%c%c", defogging[7:0],defogging[15:8],defogging[23:16]);
	end  
  end
end

//Source Image Data
assign SOURCE_B = (frame_cnt == 12'd1 || frame_cnt == 12'd2 )?readsPictureB1[addr]:
                  (frame_cnt == 12'd3 || frame_cnt == 12'd4 )?readsPictureB2[addr]:  
				  (frame_cnt == 12'd5 || frame_cnt == 12'd6 )?readsPictureB3[addr]:8'b0;
				  
assign SOURCE_G = (frame_cnt == 12'd1 || frame_cnt == 12'd2 )?readsPictureG1[addr]:
                  (frame_cnt == 12'd3 || frame_cnt == 12'd4 )?readsPictureG2[addr]: 
				  (frame_cnt == 12'd5 || frame_cnt == 12'd6 )?readsPictureG3[addr]:8'b0;
				  
assign SOURCE_R = (frame_cnt == 12'd1 || frame_cnt == 12'd2 )?readsPictureR1[addr]:
                  (frame_cnt == 12'd3 || frame_cnt == 12'd4 )?readsPictureR2[addr]:   
				  (frame_cnt == 12'd5 || frame_cnt == 12'd6 )?readsPictureR3[addr]:8'b0;
				  
assign SOURCE_RGB = {SOURCE_R,SOURCE_G,SOURCE_B};

assign frame_done_flag = (!VGA_VS & (VGA_VS_r))?1'b1:1'b0;

always @(posedge clk)begin
	if(reset_n == 1'b0)
	  addr <= 0;
	else if(addr == `PICTURE-1)
	  addr <= 0;
	else if(VGA_DE == 1'b1)
	  addr <= addr+1;
end

always @(posedge clk ) begin
  VGA_VS_r <= VGA_VS;
end

//Frame counter
always @(posedge clk or negedge reset_n) begin
  if(reset_n == 1'b0)
    frame_cnt <= 12'd0;
  else if(frame_done_flag ==1'b1)
    frame_cnt <= frame_cnt + 12'd1;
end
//--------------------------------------------------------
//DUT Start
//--------------------------------------------------------
//Vga  
vga_ctl U_VGA(
	.pix_clk(clk),
	.reset_n(reset_n),
	.VGA_RGB(SOURCE_RGB),//i
	.VGA_CLK(vga_clk),
	.hcount(hcount),
	.vcount(vcount),
	.VGA_R(VGA_R),
	.VGA_G(VGA_G),
	.VGA_B(VGA_B),
	.VGA_HS(VGA_HS),
	.VGA_VS(VGA_VS),
	.VGA_DE(VGA_DE),
	.BLK(BLK)
	);
	
	
rgb_dark U_rgb_dark(
       .pixelclk(vga_clk),
	   .reset_n(reset_n),
       
  	   .i_rgb(VGA_RGB),
	   .i_hsync(VGA_HS),
	   .i_vsync(VGA_VS),
	   .i_de(VGA_DE),
	   
       .o_dark(dark),
	   .o_hsync(dark_hsync),
	   .o_vsync(dark_vsync),                                                                                                  
	   .o_de(dark_de)                                                                                               
	   );
  
transmittance_dark U_transmittance_dark(
       .pixelclk(vga_clk),
	   .reset_n(reset_n),
       
  	   .i_rgb(dark),
	   .i_hsync(dark_hsync),
	   .i_vsync(dark_vsync),
	   .i_de(dark_de),
	   
	   .dark_max(dark_max),
       .o_dark(transmittance),
	   .o_hsync(transmittance_hsync),
	   .o_vsync(transmittance_vsync),                                                                                                  
	   .o_de(transmittance_de)                                                                                               
	   );
	   


	
defogging U_defogging(
       .pixelclk(vga_clk),
	   .reset_n(reset_n),
       
  	   .i_rgb(VGA_RGB),
	   .dark_max(dark_max),
	   .i_transmittance(transmittance),
	   .i_hsync(transmittance_hsync),
	   .i_vsync(transmittance_vsync),
	   .i_de(transmittance_de),
	   
       .o_defogging(defogging),
	   .o_hsync(defogging_hsync),
	   .o_vsync(defogging_vsync),                                                                                                  
	   .o_de(defogging_de)                                                                                               
	   );
//--------------------------------------------------------
//DUT End
//--------------------------------------------------------


endmodule