CPU设计实战 第5章 实践任务

CPU设计实战-汪文祥 邢金璋
第5章 实践任务一
实验环境 lab6.zip

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前言

在lab5的实验环境下，添加算术逻辑运算类指令，乘除运算类指令，以及乘数法配套的数据搬运指令。

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一、实验内容

添加算术逻辑运算类指令：

1.1 ADD、ADDI、SUB

/*ID_stage增加代码*/
wire        inst_add;
wire        inst_addi;
wire        inst_sub;
assign inst_add    = op_d[6'h00] & func_d[6'h20] & sa_d[5'h00];
assign inst_addi   = op_d[6'h08];
assign inst_sub    = op_d[6'h00] & func_d[6'h22] & sa_d[5'h00];

/*ID_stage修改代码*/
assign alu_op[ 0] = inst_addu | inst_addiu | inst_lw | inst_sw | inst_jal | inst_add | inst_addi;
assign alu_op[ 1] = inst_subu | inst_sub;         
assign src2_is_imm  = inst_addiu | inst_lui | inst_lw | inst_sw | inst_addi;
assign dst_is_rt    = inst_addiu | inst_lui | inst_lw | inst_addi;     
assign src2_no_rt = inst_addiu | load_op | inst_jal | inst_lui | inst_addi;                                          

1.2 SLTI、SLTIU

/*ID_stage增加代码*/
wire        inst_slti; 
wire        inst_sltiu;
assign inst_slti   = op_d[6'h0a];
assign inst_sltiu  = op_d[6'h0b];

/*ID_stage修改代码*/
assign alu_op[ 2] = inst_slt  | inst_slti; 
assign alu_op[ 3] = inst_sltu | inst_sltiu;
assign src2_is_imm  = inst_addiu | inst_lui | inst_lw | inst_sw | inst_addi | inst_slti | inst_sltiu;
assign dst_is_rt    = inst_addiu | inst_lui | inst_lw | inst_addi | inst_slti | inst_sltiu;
assign src2_no_rt = inst_addiu | load_op | inst_jal | inst_lui | inst_addi | inst_slti | inst_sltiu;

1.3 ANDI、ORI、XORI

/*ID_stage增加代码*/
wire        inst_andi;
wire        inst_ori; 
wire        inst_xori;
assign inst_andi   = op_d[6'h0c];
assign inst_ori    = op_d[6'h0d];
assign inst_xori   = op_d[6'h0e];
wire src2_is_imm_zero;
wire src2_is_imm_sign;
assign src2_is_imm_zero  = inst_andi  | inst_ori   | inst_xori | inst_lui;
assign src2_is_imm_sign  = inst_addiu | inst_lw    | inst_sw   | inst_addi 
                         | inst_slti  | inst_sltiu;
                         
/*ID_stage修改代码*/
wire [ 1:0] src2_is_imm;
assign alu_op[ 4] = inst_and  | inst_andi;
assign alu_op[ 6] = inst_or   | inst_ori;
assign alu_op[ 7] = inst_xor  | inst_xori;
assign src2_is_imm  = src2_is_imm_zero ? 2'b01 : 
                      src2_is_imm_sign ? 2'b10 : 2'b00;
assign dst_is_rt    = inst_addiu | inst_lui | inst_lw | inst_addi | inst_slti | inst_sltiu | inst_andi | inst_ori | inst_xori;
assign src2_no_r