CPU设计实战-汪文祥 邢金璋
第6章 实践任务
实验环境 lab7.zip
前言
在lab6的实验环境下,在流水线中添加转移指令和访存指令。
一、实验内容
添加转移指令:
我们将所有转移指令都放在译码级完成
//ID_stage添加代码:
wire inst_bgez;
wire inst_bgtz;
wire inst_blez;
wire inst_bltz;
wire inst_bgezal;
wire inst_bltzal;
wire inst_j;
wire inst_jalr;
assign inst_bgez = op_d[6'h01] & rt_d[5'h01];
assign inst_bgtz = op_d[6'h07] & rt_d[5'h00];
assign inst_blez = op_d[6'h06] & rt_d[5'h00];
assign inst_bltz = op_d[6'h01] & rt_d[5'h00];
assign inst_bgezal = op_d[6'h01] & rt_d[5'h11];
assign inst_bltzal = op_d[6'h01] & rt_d[5'h10];
assign inst_j = op_d[6'h02];
assign inst_jalr = op_d[6'h00] & func_d[6'h09] & rt_d[5'h00] & sa_d[5'h00];
wire rsgez;
wire rsgtz;
wire rslez;
wire rsltz;
assign rsgez = (rs_value[31] == 1'b0 || rs_value == 32'd0);
assign rsgtz = (rs_value[31] == 1'b0 && rs_value != 32'd0);
assign rslez = (rs_value[31] == 1'b1 || rs_value == 32'd0);
assign rsltz = (rs_value[31] == 1'b1 && rs_value != 32'd0);
//ID_stage修改代码:
assign alu_op[ 0] = inst_addu | inst_addiu | inst_lw | inst_sw
| inst_jal | inst_add | inst_addi | inst_jalr
| inst_bgezal | inst_bltzal| inst_lb | inst_lbu
| inst_lh | inst_lhu | inst_lwl | inst_lwr
| inst_sb | inst_sh | inst_swl | inst_swr;
assign src1_is_pc = inst_jal | inst_bgezal | inst_bltzal | inst_jalr;
assign src2_is_8 = inst_jal | inst_bgezal | inst_bltzal | inst_jalr;
assign dst_is_r31 = inst_jal | inst_bgezal | inst_bltzal;
assign gr_we = ~inst_sw & ~inst_beq & ~inst_bne & ~inst_jr &
~inst_bgez & ~inst_bgtz & ~inst_blez & ~inst_bltz &
~inst_sb & ~inst_sh & ~inst_swl & ~inst_swr;
assign br_taken = ( inst_beq && rs_eq_rt
|| inst_bne && !rs_eq_rt
|| inst_bgez && rsgez
|| inst_bgtz && rsgtz
|| inst_blez && rslez
|| inst_bltz && rsltz
|| inst_bltzal && rsltz
|| inst_bgezal && rsgez
|| inst_jal
|| inst_j
|| inst_jalr
|| inst_jr
) && ds_valid;
assign br_target = (inst_beq || inst_bne || inst_bgez || inst_bgtz || inst_blez || inst_bltz || inst_bgezal || inst_bltzal) ?
(fs_pc + {
{14{imm[15]}}, imm[15:0], 2'b0}) :
(inst_jr || inst_jalr) ? rs_value :
/*inst_jal*/