PCM_DECODER_TEST_5.v
`timescale 10ns/1ns
module PCM_DECODER_TEST_5;
reg clk;
reg rst;
reg din;
wire [7:0] dout;
wire D_en;
wire F_en;
parameter half_cycle = 10;
PCM_DECODER ut5(
.clk(clk),
.rst(rst),
.din(din),
.dout(dout),
.D_en(D_en),
.F_en(F_en)
);
initial begin
clk = 0;
forever begin
clk = # half_cycle ~ clk;
end
end
initial begin
rst = 1;
# (1 * half_cycle) rst = 0;
# (2 * half_cycle) rst = 1;
end
initial begin
din <= 0;
repeat (4) @ (posedge clk);
din <= 1;
repeat (16) @ (posedge clk);
din <= 0;
repeat (16) @ (posedge clk);
din <= 1;
repeat (160) @ (posedge clk);
din <= 1;
wave_10();
wave_11();
wave_01();
wave_01();
wave_11();
wave_11();
wave_10();
wave_01();
wave_10();
wave_10();
wave_11();
wave_01();
repeat (48) @ (posedge clk);
din <= 0;
repeat (16) @ (posedge clk);
din <= 1;
repeat (32) @ (posedge clk);
din <= 0;
repeat (20) @ (posedge clk);
$finish;
end
initial begin
$fsdbDumpfile("./verdiFsdb/PCM_DECODER_TEST_5.fsdb");
$fsdbDumpvars(0);
end
task wave_00();
repeat (16) @ (posedge clk);
din <= 0;
repeat (16) @ (posedge clk);
din <= 1;
repeat (128) @ (posedge clk);
din <= 0;
repeat (16) @ (posedge clk);
din <= 1;
repeat (16) @ (posedge clk);
din <= 1;
endtask
task wave_01();
repeat (16) @ (posedge clk);
din <= 0;
repeat (16) @ (posedge clk);
din <= 1;
repeat (96) @ (posedge clk);
din <= 0;
repeat (16) @ (posedge clk);
din <= 1;
repeat (48) @ (posedge clk);
din <= 1;
endtask
task wave_10();
repeat (48) @ (posedge clk);
din <= 0;
repeat (16) @ (posedge clk);
din <= 1;
repeat (96) @ (posedge clk);
din <= 0;
repeat (16) @ (posedge clk);
din <= 1;
repeat (16) @ (posedge clk);
din <= 1;
endtask
task wave_11();
repeat (48) @ (posedge clk);
din <= 0;
repeat (16) @ (posedge clk);
din <= 1;
repeat (64) @ (posedge clk);
din <= 0;
repeat (16) @ (posedge clk);
din <= 1;
repeat (48) @ (posedge clk);
din <= 1;
endtask
endmodule
Experiment Result
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/67dccc39f3551d69dee453a3cc3a81ea.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/bbe35e9c5669ea559d33dded74da757e.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/62bc3ed2f155ea05c57727a31b3f8863.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/07f8d091e050469a6b78665888549bfb.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/a727fdf977d3b0ec80840981758ba91d.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/81424bc0962e984f9025fb31ffb8fc53.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/b4cc74ec7ed20b310dc529bdfbf3b043.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/b10a37a038905664fb0056e6372bf924.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/2be1d4467712873ace352cd17bcd0e0c.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/c75d3ea3df6d608421675cf3e78c3df9.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/9e3f062989d09c1b03a1cf48fdad2f93.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/627f897066dd80a38da3178bfb4d82c5.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/8390ea892b8445ea6531683083d2bbf8.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/4d742415b118f2f9e09bfd5539d950ca.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/8a80f0436cad0cd893bfb4286fb7403a.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/b9fbb9948ed7df41850d948e31d59136.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/b6d85e6d5bddebe643cab0bc23dbb2b2.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/aa2ff940be12deb25c4d5d14e6819edb.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/f2462826d54cd1769fba732cf6bcd0ed.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/45b61e951a7ffe14768cc39adc63e075.png)
![在这里插入图片描述](https://i-blog.csdnimg.cn/blog_migrate/93d5219fef8bc0294b9f910db73efa0f.png)