Verilog刷题HDLBits——Adder100

题目描述

Create a 100-bit binary adder. The adder adds two 100-bit numbers and a carry-in to produce a 100-bit sum and carry out.

代码

// 我的解法
module top_module( 
    input [99:0] a, b,
    input cin,
    output cout,
    output [99:0] sum );
    
    wire[99:0] cc;
    
    generate
        genvar i;
        for(i=0;i<100;i++)begin:fadd
            if(i==0)
                full_adder add(a[0],b[0],cin,cc[0],sum[0]);
            else
                full_adder add(a[i],b[i],cc[i-1],cc[i],sum[i]);
        end
    endgenerate
    
    assign cout = cc[99];

endmodule

module full_adder(input a,b,cin,output cout,sum);
    assign cout = a&b|a&cin|b&cin;
    assign sum = a^b^cin;
endmodule

// 参考解法
module top_module (
	input [99:0] a,
	input [99:0] b,
	input cin,
	output cout,
	output [99:0] sum
);

	// The concatenation {cout, sum} is a 101-bit vector.
	assign {cout, sum} = a+b+cin;

endmodule

结果