Verilog刷题HDLBits——Adder100i

Verilog刷题HDLBits——Adder100i

题目描述

Create a 100-bit binary ripple-carry adder by instantiating 100 full adders. The adder adds two 100-bit numbers and a carry-in to produce a 100-bit sum and carry out. To encourage you to actually instantiate full adders, also output the carry-out from each full adder in the ripple-carry adder. cout[99] is the final carry-out from the last full adder, and is the carry-out you usually see.

代码

module top_module( 
    input [99:0] a, b,
    input cin,
    output [99:0] cout,
    output [99:0] sum );
    
    generate
        genvar i;
        for(i=0;i<100;i++)
            begin:add_loop
                if(i==0)
                    begin
                        assign cout[0] = a[0]&b[0]|a[0]&cin|b[0]&cin;
                        assign sum[0] = a[0]^b[0]^cin;
                    end
                else
                    begin
                        assign cout[i] = a[i]&b[i]|a[i]&cout[i-1]|b[i]&cout[i-1];
                        assign sum[i] = a[i]^b[i]^cout[i-1];
                    end
            end
    endgenerate

endmodule

结果

在这里插入图片描述

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