GVM32 系统频率修改

1.system_gvm32f10x.c 打开
取消掉需要修改的注释

2.如果外部晶振修改
gvm32f10x.h 打开
#define HSE_VALUE (12000000) /*!< Value of the External oscillator in Hz /括号内修改更改的晶振频率

3.修改系统频率
找到对应的函数static void SetSysClockTo72(void)
ANCTL->PLLCR = ANCTL_PLLCR_PLLMUL_12;修改倍频系数
公式：
/ PLL configuration: PLLCLK = 12MHz / 2 * 12 = 72 MHz */
4.时钟初始化函数

/**
 * @brief  Configures the Main clock frequency, HCLK, PCLK2 and PCLK1
 *         prescalers.
 * @return None
 */
void SystemClock_Configuration(void)
{
  /* Enable APB1CLK. APB1CLK = MAINCLK */
  RCC_APB1CLKConfig(RCC_MAINCLK_Div1, ENABLE);

  /* Enable BMX1 and GPIOD clock */
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_BMX1 |RCC_APB1Periph_GPIOD, ENABLE);

  /* Configure PD0 and PD1 to analog mode */
  GPIO_Init(GPIOD, GPIO_Pin_0 |GPIO_Pin_1, GPIO_MODE_ANA);

  /* Disable ANCTL register write-protection */
  PWR_UnlockANA();

  /* Enable HSE */
  ANCTL_HSEConfig(ANCTL_HSE_ON);

  /* Wait till HSE is ready */
  if (ANCTL_WaitForHSEStartUp() == ERROR)
  {
    /* HSE failed */
    while (1);
  }

  /* Configure Flash prefetch, Cache and wait state */
  CACHE->CR = CACHE_CR_CHEEN | CACHE_CR_PREFEN_ON | CACHE_CR_LATENCY_3WS;

  /* AHBCLK = MAINCLK */
  RCC_AHBCLKConfig(RCC_MAINCLK_Div1);

  /* Enable APB2CLK. APB2CLK = MAINCLK */
  RCC_APB2CLKConfig(RCC_MAINCLK_Div1, ENABLE);

  /* PLL configuration: PLLCLK = HSE(12MHz/2) * 12 = 72 MHz */
  RCC_PLLSourceConfig(RCC_PLLSource_HSE_Div2, ENABLE);//先分频再倍频，在这里修改系数
  ANCTL_PLLConfig(ANCTL_PLLMul_12);

  /* Enable PLL */
  ANCTL_PLLCmd(ENABLE);

  /* Wait till PLL is ready */
  while(ANCTL_GetFlagStatus(ANCTL_FLAG_PLLRDY) == RESET);

  /* Enable ANCTL register write-protection */
  PWR_LockANA();

  /* Select PLL as system clock source */
  RCC_MAINCLKConfig(RCC_MAINCLKSource_PLLCLK);
}

至此 查看是否修改成功 参见https://blog.csdn.net/weixin_49048045/article/details/119674171
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