APB协议断言检查你必需知道的几点

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已于 2022-05-12 19:18:03 修改

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分类专栏：断言验证文章标签：功能测试经验分享 fpga开发前端

于 2022-04-04 20:27:41 首次发布

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本文详细解读了APB协议中的时序图和关键断言检查规则，包括psel、paddr、penable、pwdata等信号的行为规范，确保正确性和一致性。通过assertproperty检查，提升系统设计的可靠性。

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一、APB时序图

1.write transfer

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2.Read transfer

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3.Operating states

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二、APB协议断言检查

1.psel为高时，paddr不可以为X值

property psel_no_x;
	@(posedge clk) psel |-> not ($isunknown(paddr));
endproperty: psel_no_x

assert property (psel_no_x) else 
	`uvm_error("ASSERT", "PADDR is unknown when PSEL is high")

2. psel 拉高的下一周期，penable必须拉高

property psel_rose_then_penable_rose;
	@(posedge) $rose(psel) ##1 $rose(penable);
endproperty: psel_rose_then_penable_rose

assert property(psel_rose_then_penable_rose ）else
	`uvm_error("ASSERT", "PENABLE not rose after 1 cycle PSEL rose")

3.在penable拉高的下一周期，penable应该拉低

property penable_rose_next_cycle_fell;
	@(posedge clk) $rose(penable) ##1 $fell(penable);
endproperty

assert property(penable_high_then_low) else
	`uvm_error("ASSERT", "PENABLE not fall after 1 cycle PENABLE rose")

4.psel和pwrite同时保持高的阶段，pwdata需要保持不变

property pwdata_stable_during_trans_phase;
	@(posedge clk) ((plse && !penable) ##1 (psel && penabel) ) |-> $stable(pwdata);
endproperty

assert property(pwdata_stable_during_trans_phase) else
	`uvm_error("ASSERT", "PWDATA not stable during transaction phase")

5.在下次传输开始前，paddr和pwrite信号应该保持不变

property paddr_stable_until_next_trans;
    logic[31:0] addr1, addr2;
    @(posedge clk) first_match(($rose(penable),addr1=paddr) ##1 ((psel && !penable)[=1],addr2=$past(paddr))) |-> addr1 == addr2;
  endproperty: paddr_stable_until_next_trans
  
  assert property(paddr_stable_until_next_trans)
  	 else `uvm_error("ASSERT", "PADDR not stable until next transaction start")
  	 
//------------------------------------------------------------------------------------------------------//

property pwrite_stable_until_next_trans;
    logic pwrite1, pwrite2;
    @(posedge clk) first_match(($rose(penable),pwrite1=pwrite) ##1 ((psel && !penable)[=1],pwrite2=$past(pwrite))) |-> pwrite1 == pwrite2;
  endproperty: pwrite_stable_until_next_trans
  
  assert property(pwrite_stable_until_next_trans) else 
  	`uvm_error("ASSERT", "PWRITE not stable until next transaction start")

6.在penable拉高的同一个周期，prdata也应该发生变化

property prdata_available_once_penable_rose;
    @(posedge clk) $rose(penable) && !pwrite |-> !$stable(prdata);
  endproperty: prdata_available_once_penable_rose
  assert property(prdata_available_once_penable_rose) else `
  	`uvm_error("ASSERT", "PRDATA not available once PENABLE rose")