基于STM32的0.96寸OLED显示屏显示数据

一、了解SPI(串行外设接口)

1.SPI的定义
SPI(Serial Peripheral Interface)就是串行外围设备接口。
SPI,是一种高速的,全双工,同步的通信总线,并且在芯片的管脚上只占用四根线,节约了芯片的管脚。SPI 是一个环形总线结构,由 ss(cs)、sck、sdi、sdo 构成,时序主要是在 sck 的控制下,两个双向移位寄存器进行数据交换。
上升沿发送、下降沿接收、高位先发送。
上升沿到来的时候,sdo 上的电平将被发送到从设备的寄存器中。
下降沿到来的时候,sdi 上的电平将被接收到主设备的寄存器中。
2.SPI的连接方式请添加图片描述
SS( Slave Select):从设备选择信号线,常称为片选信号线。
SCK (Serial Clock):时钟信号线,用于通讯数据同步。
MOSI (Master Output, Slave Input):主设备输出/从设备输入引脚。
MISO(Master Input,,Slave Output):主设备输入/从设备输出引脚。
3.SPI的通讯过程
请添加图片描述
MOSI 与 MISO 的信号只在 NSS 为低电平的时候才有效,在 SCK 的每个时钟周期 MOSI 和 MISO 传输一位数据。

二、使用0.96寸OLED显示屏显示数据

1.实验工具与材料
软件:keil
硬件:PC机,STM32开发板(本过程采用的是野火stm32mini开发板),0.96寸OLED显示屏,下载器(本过程采用ST_Link)
2.0.96寸OLED显示屏相关介绍
参考下面链接:
http://www.lcdwiki.com/zh/0.96inch_SPI_OLED

Pin Number Symbol I/O Function P Po o we er r S Su up pp pl ly y 9 VDD P P Po o we er r S Su up pp pl ly y f fo or r L Lo og gi ic c This is a voltage supply pin. It must be connected to external source. 8 VSS P G Gr ro ou un nd d o of f L Lo og gi ic c C Ci ir rc cu ui it t This is a ground pin. It acts as a reference for the logic pins. It must be connected to external ground. 28 VCC P P Po o we er r S Su up pp pl ly y f fo or r OE EL L P Pa an ne el l This is the most positive voltage supply pin of the chip. A stabilization capacitor should be connected between this pin and V SS when the converter is used. It must be connected to external source when the converter is not used. 29 VLSS P G Gr ro ou un nd d o of f A An na al lo og g C Ci ir rc cu ui it t This is an analog ground pin. It should be connected to V SS externally. D Dr ri iv ve er r 26 IREF I C Cu ur rr re en nt t R Re ef fe er re en nc ce e f fo or r B Br ri ig gh ht tn ne es ss s A Ad dj ju us st t me en nt t This pin is segment current reference pin. A resistor should be connected between this pin and V SS . Set the current at 12.5μA maximum. 27 VCOMH O V Vo ol lt ta ag ge e Ou ut tp pu ut t Hi ig gh h L Le ev ve el l f fo or r C C O M S Si ig gn na al l This pin is the input pin for the voltage output high level for COM signals. A capacitor should be connected between this pin and V SS . D DC C/ /D DC C C Co on nv ve er rt te er r 6 VDDB P P Po o we er r S Su up pp pl ly y f fo or r DC C/ / DC C C Co on nv ve er rt te er r C Ci ir rc cu ui it t This is the power supply pin for the internal buffer of the DC/DC voltage converter. It must be connected to external source when the converter is used. It should be connected to V DD when the converter is not used. 4 / 5 2 / 3 C1P / C1N C2P / C2N I P Po os si it ti iv ve e T Te er r mi in na al l o of f t th he e F Fl ly yi in ng g I In nv ve er rt ti in ng g C Ca ap pa ac ci it to or r Ne eg ga at ti iv ve e T Te er r mi in na al l o of f t th he e F Fl ly yi in ng g B Bo oo os st t C Ca ap pa ac ci it to or r The charge-pump capacitors are required between the terminals. They must be floated when the converter is not used. I In nt te er rf fa ac ce e 10 11 12 BS0 BS1 BS2 I C Co o m mu un ni ic ca at ti in ng g P Pr ro ot to oc co ol l S Se el le ec ct t These pins are MCU interface selection input. See the following table: BS0 BS1 BS2 I 2 C 0 1 0 3-wire SPI 1 0 0 4-wire SPI 0 0 0 8-bit 68XX Parallel 0 0 1 8-bit 80XX Parallel 0 1 1 14 RES# I P Po o we er r R Re es se et t f fo or r C Co on nt tr ro ol ll le er r a an nd d Dr ri iv ve er r This pin is reset signal input. When the pin is low, initialization of the chip is executed. Keep this pin pull high during normal operation. 13 CS# I C Ch hi ip p S Se el le ec ct t This pin is the chip select input. The chip is enabled for MCU communication only when CS# is pulled low. 15 D/C# I Da at ta a/ /C Co o m ma an nd d C Co on nt tr ro ol l This pin is Data/Command control pin. When the pin is pulled high, the input at D7~D0 is treated as display data. When the pin is pulled low, the input at D7~D0 will be transferred to the command register. When the pin is pulled high and serial interface mode is selected, the data at SDIN will be interpreted as data. When it is pulled low, the data at SDIN will be transferred to the command register. In I 2 C mode, this pin acts as SA0 for slave address selection. For detail relationship to MCU interface signals, please refer to the Timing Characteristics Diagrams. 17 E/RD# I R Re ea ad d/ / Wr ri it te e E En na ab bl le e o or r R Re ea ad d This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled high and the CS# is pulled low. When connecting to an 80XX-microprocessor, this pin receives the Read (RD#) signal. Data read operation is initiated when this pin is pulled low and CS# is pulled low. When serial or I 2 C mode is selected, this pin must be connected to V SS . GoldenMorning Electronic 4 1.5 Pin Definition (Continued) Pin Number Symbol I/O Function I In nt te er rf fa ac ce e ( (C Co on nt ti in nu ue ed d) ) 16 R/W# I R Re ea ad d/ / Wr ri it te e S Se el le ec ct t o or r Wr ri it te e This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as Read/Write (R/W#) selection input. Pull this pin to “High” for read mode and pull it to “Low” for write mode. When 80XX interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled low and the CS# is pulled low. When serial or I 2 C mode is selected, this pin must be connected to V SS . 18~25 D0~D7 I/O Ho os st t Da at ta a I In np pu ut t/ / Ou ut tp pu ut t B Bu us s These pins are 8-bit bi-directional data bus to be connected to the microprocessor’s data bus. When serial mode is selected, D1 will be the serial data input SDIN and D0 will be the serial clock input SCLK. When I 2 C mode is selected, D2 & D1 should be tired together and serve as SDA out & SDA in in application and D0 is the serial clock input SCL. Unused pins must be connected to V SS except for D2 in serial mode. R Re es se er rv ve e 7 N.C. - R Re es se er rv ve ed d P Pi in n The N.C. pin between function pins are reserved for compatible and flexible design. 1, 30 N.C. (GND) - R Re es se er rv ve ed d P Pi in n ( (S Su up pp po or rt ti in ng g P Pi in n) ) The supporting pins can reduce the influences from stresses on the function pins. These pins must be connected to external ground as the ESD protection circuit.
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