31条MIPS指令单周期CPU数据通路

本文详细描述了一项计算机科学课程中的项目——设计31条MIPS指令的CPU,涉及数据通路图、不同类型的指令(如R型、I型、J型)及其操作,以及硬件实现的关键步骤。作者强调了硬件设计的精细和调试过程的重要性。
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写在前面

31条MIPS指令CPU 算是计组课设第一个比较大的项目了,好在他不是很难,到后面流水线,其实基本上就没有人写的出来了,虽说计科作业一大抄(我愿称之为站在巨人的肩膀上),但是我觉着这个项目还是值得写一写的,完成这个项目,会对CPU的核心功能有非常深刻的认识和理解,并且会对前面学过的知识有一个非常充分的理解和应用.

整个31条指令CPU从开始到完成用了整整3天时间,不同于写软件,硬件是要慢工出细活,不然哪里理解有错误,就要返工,如此以往就会一不小心打开Github找代码浪费非常多的时间

好了废话不多说,我们进入正题, 先从 画好数据通路图开始,理解画好通路图,基本上一天就能debug完所有的CPU.

MIPS上有一份文档,对31条指令的讲解算比较详细的,这里我就直接截图到每个指令下面去了.

R型指令

通路类型1

1.ADD

image-20230903152606092

image-20230903152619181

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
out1 -> A , out2 -> B
(A + B -> RES)
ans -> in

2.ADDU

image-20230903152654109

image-20230903152705235

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
out1 -> A , out2 -> B
(A + B -> RES)
ans -> in

3.SUB

image-20230903152737639

image-20230903152750362

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
out1 -> A , out2 -> B
(A - B -> RES)
ans -> in

4.SUBU

image-20230903152816000

image-20230903152836568

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
out1 -> A , out2 -> B
(A - B -> RES)
ans -> in

5.AND

image-20230903152913243

image-20230903152921102

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
out1 -> A , out2 -> B
(A & B -> RES)
ans -> in

6.OR

image-20230903152951212

image-20230903152959397

image-20230903153007873

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
out1 -> A , out2 -> B
(A | B -> RES)
ans -> in

7.XOR

image-20230903153044772

image-20230903153056418

image-20230903153103917

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
out1 -> A , out2 -> B
(A ⊕ B -> RES)
ans -> in

8.NOR

image-20230903153124557

image-20230903153134776

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
out1 -> A , out2 -> B
(A ⊙ B -> RES)
ans -> in

通路类型2

9.SLT

image-20230903153202748

image-20230903153209325

image-20230903153217447

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
out1 -> A , out2 -> B
(A - B -> ans) //相减判断,负数则为Rs中数小
negative -> EXT1 //注意要做扩展
EXT1 -> in

10.SLTU

image-20230903153241700

image-20230903153249301image-20230903153304789

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
out1 -> A , out2 -> B
(A - B -> ans) //相减判断,负数则为Rs中数小
negative -> EXT1 //注意要做扩展
EXT1 -> in

通路类型3

11.SLL

image-20230903153343889

image-20230903153350249

image-20230903153358972

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
IMEM[10:6] -> EXT5
EXT5 -> A
out2 -> B
(B<<A -> ans)
ans -> in

12.SRL

image-20230903153420881

image-20230903153426488

image-20230903153434362

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
IMEM[10:6] -> EXT5
EXT5 -> A
out2 -> B
(B>>A -> ans)
ans -> in

13.SRA

image-20230903153503190

image-20230903153511161

image-20230903153519996

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
IMEM[10:6] -> EXT5
EXT5 -> A
out2 -> B
(B>>A -> ans)
ans -> in

通路类型4

14.SLLV

image-20230903153555626

image-20230903153602037

image-20230903153614340

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
out1[4:0] -> EXT5
EXT5 -> A
out2 -> B
(A<<B -> ans)
ans -> in

15.SRLV

image-20230903153636747

image-20230903153648629

image-20230903153657786

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
out1[4:0] -> EXT5
EXT5 -> A
out2 -> B
(A >> B -> ans)
ans -> in

16.SRAV

image-20230903153721162

image-20230903153727591

image-20230903153734246

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
out1[4:0] -> EXT5
EXT5 -> A
out2 -> B
(A >> B -> ans)
ans -> in

通路类型5

17.JR

image-20230903153807912

image-20230903153817871

image-20230903153836543

PC -> IMEM
PC + 4 -> NPC //无关指令
out1 -> MUX
MUX_OUT -> PC
NPC -> MUX //无关指令

I型指令

通路类型6

18.ADDI

image-20230903153918136

image-20230903153924042

image-20230903153931935

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
IMEM[15:0] -> EXT16
EXT16-> B
out1 -> A
(A + B -> RES)
ans -> Rd

19.ADDIU

image-20230903154019616

image-20230903154025503

image-20230903154031767

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
IMEM[15:0] -> EXT16
EXT16-> B
out1 -> A
(A + B -> RES)
ans -> Rd

20.ANDI

image-20230903154056829

image-20230903154103829

image-20230903154110896

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
IMEM[15:0] -> EXT16
EXT16-> B
out1 -> A
(A & B -> RES)
ans -> Rd

21.ORI

image-20230903154132439

image-20230903154138601

image-20230903154148393

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
IMEM[15:0] -> EXT16
EXT16-> B
out1 -> A
(A | B -> RES)
ans -> Rd

22.XORI

image-20230903154209565

image-20230903154215544

image-20230903154221885

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
IMEM[15:0] -> EXT16
EXT16-> B
out1 -> A
(A ⊕ B -> RES)
ans -> Rd

通路类型7

###23.LW

image-20230903154256703

image-20230903154304112

image-20230903154311792

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
IMEM[15:0] -> EXT16
EXT16 -> B
out1 -> A
(A + B -> ans)
ans -> DMEM_ADDR
data -> in

通路类型8

24.SW

image-20230903154340703

image-20230903154346852

image-20230903154354355

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
IMEM[15:0] -> EXT16
EXT16_OUT -> B
out1 -> A
(A + B -> ans)
out2 -> DMEM
ans -> DMEM_ADDR

通路类型9

25.BEQ

image-20230903154421935

image-20230903154429754

image-20230903154436939

PC -> IMEM
PC + 4 -> NPC
NPC -> MUX
IMEM[15:0] || 02 -> EXT18
EXT18_OUT -> ADD_A
NPC -> ADD_B
(ADD_A + ADD_B -> ADD_OUT)
ADD_OUT -> MUX
out1 -> A
out2 -> B
(A - B -> RES)
zero -> MUX
MUX -> PC

26.BNE

image-20230903154457977

image-20230903154503904

image-20230903154515306

PC -> IMEM
PC + 4 -> NPC
NPC -> MUX
IMEM[15:0] || 02 -> EXT18
EXT18_OUT -> ADD_A
NPC -> ADD_B
(ADD_A + ADD_B -> ADD_OUT)
ADD_OUT -> MUX
out1 -> A
out2 -> B
(A - B -> RES)
zero -> MUX
MUX -> PC

通路类型10

27.SLTI

image-20230903154548160

image-20230903154555439

image-20230903154604103

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
IMEM[15:0] -> EXT16
EXT16 -> B
out1 -> A
(A - B -> RES)
Carry -> EXT1
EXT1 -> in

28.SLTIU

image-20230903154623846

image-20230903154629949

image-20230903154637208

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
IMEM[15:0] -> EXT16
EXT16 -> B
out1 -> A
(A - B -> ans)
Carry -> EXT1
EXT1 -> in

通路类型11

29.LUI

image-20230903154708496

image-20230903154715278

image-20230903154722528

PC -> IMEM
PC + 4 -> NPC
NPC -> PC
IMEM[15:0] -> EXT16
EXT16 -> B
res -> in

J型指令

通路类型12

30.J

image-20230903154810007

image-20230903154817859

image-20230903154825162

PC -> IMEM
PC + 4 -> NPC
NPC -> MUX
PC[31:28] -> ||_A
IMEM[25,0] || 00 -> ||_B
||_OUT -> MUX
MUX_OUT -> PC

通路类型13

31.JAL

image-20230903154854257

image-20230903154859827

顶层控制器和数据总通路图

到这一步你的CPU 就算完成**70%**了,剩下的就是完成顶层控制器和调试,控制器我使用了布硬线的方法,因为微程序我不会对照着真值表弄好你的数据选择器即可.

数据总通路图

image-20230903161838124

顶层控制器真值表

image-20230903161920066

ALU(看不懂可以跳过这张图)

image-20230903162004491

源代码

原代码太多我就不一个一个写了,项目里有我的报告,如果对你有帮助,希望支持下我的CSDN和我的博客(现在正在加急开发中,以后会有更多功能上限)

我的博客网址 : https://zzhaire.github.io/

我的CSDN :

项目源代码 : https://github.com/zzhaire/31SinglePeriodMipsCpu

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