项目总结: RK356X Camera bring up

项目总结

在RK3568 平台 调试camera 功能。 单个camera,RAW sensor , 4lane mipi

代码配置

按照rock chip参考文档配置 -> 管用

/* full mode: lane0-3 */
gc8034: gc8034@37 {
		// 需要与驱动中的匹配字符串一致
		compatible = "galaxycore,gc8034";
		status = "okay";
		// sensor I2C设备地址，7位
		reg = <0x37>;
		// sensor mclk源配置
		clocks = <&cru CLK_CIF_OUT>;
		clock-names = "xvclk";
		//sensor 相关电源域使能
		power-domains = <&power RK3568_PD_VI>;
		//sensor mclk pinctl设置
		pinctrl-names = "default";
		pinctrl-0 = <&cif_clk>;
		// reset管脚分配及有效电平
		reset-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;
		// powerdown管脚分配及有效电平
		pwdn-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
		// 模组编号，该编号不要重复
		rockchip,camera-module-index = <0>;
		// 模组朝向，有"back"和"front"
		rockchip,camera-module-facing = "back";
		// 模组名
		rockchip,camera-module-name = "RK-CMK-8M-2-v1";
		// lens名
		rockchip,camera-module-lens-name = "CK8401";
		port {
			gc8034_out: endpoint {
			// csi2 dphy端的port名
			remote-endpoint = <&dphy0_in>;
			// csi2 dphy lane数，1lane为 <1>, 4lane为 <1 2 3 4>
			data-lanes = <1 2 3 4>;
			};
		};
};
&csi2_dphy_hw {
	status = "okay";
};
&csi2_dphy0 {
	//csi2_dphy0不与csi2_dphy1/csi2_dphy2同时使用，互斥
	status = "okay";
	/*
	* dphy0 only used for full mode,
	* full mode and split mode are mutually exclusive
	*/
		ports {
		#address-cells = <1>;
		#size-cells = <0>;
					port@0 {
							reg = <0>;
							#address-cells = <1>;
							#size-cells = <0>;
							dphy0_in: endpoint@1 {
										reg = <1>;
										// sensor端的 port名
										remote-endpoint = <&gc8034_out>;
										// csi2 dphy lane数，1lane为 <1>, 4lane为 <1 2 3 4>,需与sensor
										端一致
										data-lanes = <1 2 3 4>;
							};
					};
					port@1 {
							reg = <1>;
							#address-cells = <1>;
							#size-cells = <0>;
							dphy0_out: endpoint@1 {
							reg = <1>;
							// isp端的port名
							remote-endpoint = <&isp0_in>;
					};
		};
};
};
&rkisp {
	status = "okay";
};
&rkisp_mmu {
	status = "okay";
};
&rkisp_vir0 {
	status = "okay";
	port {
		#address-cells = <1>;
		#size-cells = <0>;
		isp0_in: endpoint@0 {
				reg = <0>;
				// csi2 dphy端的 port名
				remote-endpoint = <&dphy0_out>;
		};
	};
};

RK3568的链接关系 : sensor->csi2_dphy0->isp

开机日志

[    1.835197] hi846 4-0021: driver version: 00.01.00
[    1.835249] hi846 4-0021: Failed to get power-gpios, maybe no use
[    1.835338] hi846 4-0021: 4-0021 supply avdd not found, using dummy regulator
[    1.835401] hi846 4-0021: Linked as a consumer to regulator.0
[    1.835452] hi846 4-0021: 4-0021 supply dovdd not found, using dummy regulator
[    1.835504] hi846 4-0021: 4-0021 supply dvdd not found, using dummy regulator
[    1.835571] hi846 4-0021: lane_num(4)  pixel_rate(287964000)
[    1.835585] hi846 4-0021: could not get default pinstate
[    1.835595] hi846 4-0021: could not get sleep pinstate
[    1.849480] vendor storage:20190527 ret = 0
[    1.856811] hi846 4-0021: Detected Hi0846 sensor
[    1.856858] rockchip-csi2-dphy csi2-dphy0: dphy0 matches m00_b_hi846 4-0021:bus type 4
[    1.856876] hi846 4-0021: hi846_g_mbus_config(1603) enter!
[    1.857206] hi846 4-0021: hi846_g_mbus_config(1603) enter!
[    1.857225] hi846 4-0021: hi846_g_mbus_config(1603) enter!
[    1.857245] rkisp-vir0: Async subdev notifier completed

关键点答疑

1.整理电路原理图， 确认硬件实际情况
2. 根据日志log 确认出现的问题点
3. kernel ok, 还需要系统配置才能正常使用
4. RK文档可以