cs61c_lab5
Part 1: Sub-Circuits
NAND1
NOR1
XOR1
MUX2
通过列真值表可以得到以下逻辑式:
¬ A B S e l + A ¬ B ¬ S e l + A B ¬ S e l + A B S e l = R E S U L T \neg{A}BSel+A\neg{B}\neg{Sel}+AB\neg{Sel}+ABSel=RESULT ¬ABSel+A¬B¬Sel+AB¬Sel+ABSel=RESULT
可以画出如下电路:
参考大佬的电路图后发现可以化简1:
R
E
S
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T
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¬
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B
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¬
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+
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RESULT=\neg{A}BSel+A\neg{B}\neg{Sel}+AB\neg{Sel}+ABSel \\=BSel(A+\neg{A})+A\neg{Sel}(B+\neg{B})\\=A\neg{Sel}+BSel
RESULT=¬ABSel+A¬B¬Sel+AB¬Sel+ABSel=BSel(A+¬A)+A¬Sel(B+¬B)=A¬Sel+BSel
化简后电路图如下:
MUX4
两个MUX2可以组成一个MUX4
Part 2: Storing State
Part 3: FSMs to Digital Logic
StateBitOne
根据真值表化简后可得
s
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¬
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st1_{next} = input + st0\neg{input}
st1next=input+st0¬input
StateBitZero
根据真值表化简后可得
s
t
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x
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=
¬
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s
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˙
st0_{next} = \neg{input} + st1\dot{input}
st0next=¬input+st1input˙
Part 4: Practice with Splitters
如下:
Part 5: Rotate Right
rot8
rot4
rot2
rot1
rotr
https://github.com/PKUFlyingPig/CS61C-labs/blob/master/lab05_Logism/ex1.circ ↩︎