目录
2.3.2 arch/arm/dts/exynos4412-tiny4412.dts
2.3.3 arch/arm/mach-exynos/Kconfig
2.3.4 arch/arm/mach-exynos/clock_init_exynos4.c
2.3.5 arch/arm/mach-exynos/dmc_init_exynos4.c
2.3.6 arch/arm/mach-exynos/exynos4412_setup.h
2.3.7 arch/arm/mach-exynos/lowlevel_init.c
2.3.8 arch/arm/mach-exynos/tzpc.c
2.3.9 board/samsung/tiny4412/Kconfig
2.3.10 board/samsung/tiny4412/MAINTAINERS
2.3.11 board/samsung/tiny4412/Makefile
2.3.12 board/samsung/tiny4412/tiny4412.c
2.3.13 board/samsung/tiny4412/tools/mktiny4412spl.c
2.3.14 configs/tiny4412_defconfig
2.3.15 include/configs/tiny4412.h
3.8.2 从SD卡读取U-Boot镜像，并烧录到eMMC BOOT1分区
0. 环境介绍
开发环境：Ubuntu 20.04.1 LTS (GNU/Linux 5.4.0-37-generic x86_64)
交叉编译工具链：xkwy-gcc-20200517.tar.xz
U-Boot版本：u-boot-2020.07
开发板底板：Tiny4412/Super4412SDK 1506
开发板核心板：Tiny4412 (1412)
CPU：Exynos 4412 （4 * Cortex-A9，1.4GHz）
DDR：2 * K4B4G1646D-BCK0 （2 * 4Gbit，1GB）
EMMC：SAMSUNG KLM8G2FEJA-A001 （8GB）
1. 成果/目标
- UART0作为调试串口（波特率921600bps）；
- 支持DDR3（1GB，地址空间：0x40000000~0x7FFFFFFF）
- 支持外置SD卡读写，并支持由外置SD卡启动；
- 支持内置eMMC读写，并支持由内置eMMC启动。
2. 移植过程
2.1 下载U-Boot官方原版源码包
官方下载地址：ftp://ftp.denx.de/pub/u-boot/u-boot-2020.07.tar.bz2
xkwy2018.cn镜像地址：https://xkwy2018.cn/tiny4412/u-boot/2020.07-tiny4412/u-boot-2020.07.tar.bz2
$ wget https://xkwy2018.cn/tiny4412/u-boot/2020.07-tiny4412/u-boot-2020.07.tar.bz2
--2020-07-25 10:16:44-- https://xkwy2018.cn/tiny4412/u-boot/2020.07-tiny4412/u-boot-2020.07.tar.bz2
Resolving xkwy2018.cn (xkwy2018.cn)... 64.64.240.120
Connecting to xkwy2018.cn (xkwy2018.cn)|64.64.240.120|:443... connected.
HTTP request sent, awaiting response... 200 OK
Length: 15338841 (15M) [application/x-bzip2]
Saving to: ‘u-boot-2020.07.tar.bz2’
u-boot-2020.07.tar.bz2 100%[=========================================================>] 14.63M 7.10MB/s in 2.1s
2020-07-25 10:16:47 (7.10 MB/s) - ‘u-boot-2020.07.tar.bz2’ saved [15338841/15338841]2.2 解压源码包，并进入源码目录
$ tar xf u-boot-2020.07.tar.bz2
$ cd u-boot-2020.07/2.3 修改代码
完整的patch文件：https://xkwy2018.cn/tiny4412/u-boot/2020.07-tiny4412/u-boot-2020.07-tiny4412.patch
2.3.0 懒人必备：所有patch一键打补丁
使用curl下载patch文件，然后用patch命令给官方原始u-boot-2020.07打补丁。
$ curl -s https://xkwy2018.cn/tiny4412/u-boot/2020.07-tiny4412/u-boot-2020.07-tiny4412.patch | patch -p1
patching file arch/arm/dts/Makefile
patching file arch/arm/dts/exynos4412-tiny4412.dts
patching file arch/arm/mach-exynos/Kconfig
patching file arch/arm/mach-exynos/clock_init_exynos4.c
patching file arch/arm/mach-exynos/dmc_init_exynos4.c
patching file arch/arm/mach-exynos/exynos4412_setup.h
patching file arch/arm/mach-exynos/lowlevel_init.c
patching file arch/arm/mach-exynos/tzpc.c
patching file board/samsung/tiny4412/Kconfig
patching file board/samsung/tiny4412/MAINTAINERS
patching file board/samsung/tiny4412/Makefile
patching file board/samsung/tiny4412/tiny4412.c
patching file board/samsung/tiny4412/tools/mktiny4412spl.c
patching file configs/tiny4412_defconfig
patching file include/configs/tiny4412.h注：如果做了此步骤，2.3后面的章节可全部略过，直接跳到3 配置、编译、下载、测试。
2.3.1 arch/arm/dts/Makefile
在CONFIG_EXYNOS4下面添加tiny4412用的设备树dtb文件
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 89fa448818..107f933f05 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -11,6 +11,7 @@ dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
exynos4210-smdkv310.dtb \
exynos4210-universal_c210.dtb \
exynos4210-trats.dtb \
+ exynos4412-tiny4412.dtb \
exynos4412-trats2.dtb \
exynos4412-odroid.dtb
2.3.2 arch/arm/dts/exynos4412-tiny4412.dts
新增设备树文件：exynos4412-tiny4412.dts
主要是配置调试串口位于UART0，mmc0映射为内置eMMC，mmc2映射为外部SD卡
diff --git a/arch/arm/dts/exynos4412-tiny4412.dts b/arch/arm/dts/exynos4412-tiny4412.dts
new file mode 100755
index 0000000000..8e36148f5c
--- /dev/null
+++ b/arch/arm/dts/exynos4412-tiny4412.dts
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * xkwy's Exynos4412 based Tiny4412 board device tree source
+ *
+ * Copyright (c) xkwy2018.cn
+ * http://xkwy2018.cn/tiny4412
+ */
+
+/dts-v1/;
+#include "exynos4412.dtsi"
+
+/ {
+ model = "xkwy Tiny4412 based on Exynos4412";
+ compatible = "xkwy,tiny4412", "samsung,exynos4412";
+
+ aliases {
+ console = &serial_0;
+
+ serial0 = &serial_0;
+ serial1 = &serail_1;
+ serial2 = &serial_2;
+ serial3 = &serial_3;
+ serial4 = &serial_4;
+
+ mmc0 = &mshc_0;
+ mmc2 = &sdhci2;
+ };
+};
+
+&serial_0 {
+ status = "okay";
+};
+
+&mshc_0 {
+ samsung,bus-width = <8>;
+ samsung,timing = <2 1 0>;
+ samsung,removable = <0>;
+ fifoth_val = <0x203f0040>;
+ bus_hz = <400000000>;
+ div = <0x3>;
+ index = <4>;
+ status = "okay";
+};
+
+&sdhci2 {
+ samsung,bus-width = <4>;
+ samsung,timing = <1 2 3>;
+ cd-gpios = <&gpk2 2 0>;
+ cd-inverted;
+ status = "okay";
+};2.3.3 arch/arm/mach-exynos/Kconfig
配置Kconfig，增加TINY4412开发板
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 14347e7c7d..8cf46654c9 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -67,6 +67,10 @@ config TARGET_ORIGEN
bool "Exynos4412 Origen board"
select SUPPORT_SPL
+config TARGET_TINY4412
+ bool "Exynos4412 Tiny4412 board"
+ select SUPPORT_SPL
+
config TARGET_TRATS2
bool "Exynos4412 Trat2 board"
@@ -161,6 +165,7 @@ source "board/samsung/smdkv310/Kconfig"
source "board/samsung/trats/Kconfig"
source "board/samsung/universal_c210/Kconfig"
source "board/samsung/origen/Kconfig"
+source "board/samsung/tiny4412/Kconfig"
source "board/samsung/trats2/Kconfig"
source "board/samsung/odroid/Kconfig"
source "board/samsung/arndale/Kconfig"
2.3.4 arch/arm/mach-exynos/clock_init_exynos4.c
修改时钟配置，原来的时钟结构体struct exynos4_clock是Exynos 4210的，Exynos 4412的这一部分寄存器有变化，因此需要改成struct exynos4x12_clock；
再增加一个emmc启动的时钟配置函数emmc_boot_clk_div_set，SPL里面emmc启动时会调用这个函数，由于所有的时钟都已经预先配置好了，因此这个函数里面什么都不做。
diff --git a/arch/arm/mach-exynos/clock_init_exynos4.c b/arch/arm/mach-exynos/clock_init_exynos4.c
index 584e4bac09..7e12d742b0 100644
--- a/arch/arm/mach-exynos/clock_init_exynos4.c
+++ b/arch/arm/mach-exynos/clock_init_exynos4.c
@@ -30,7 +30,11 @@
#include <asm/arch/clk.h>
#include <asm/arch/clock.h>
#include "common_setup.h"
+#if IS_ENABLED(CONFIG_TINY4412)
+#include "exynos4412_setup.h"
+#else
#include "exynos4_setup.h"
+#endif
/*
* system_clock_init: Initialize core clock and bus clock.
@@ -38,8 +42,13 @@
*/
void system_clock_init(void)
{
+#if IS_ENABLED(CONFIG_TINY4412)
+ struct exynos4x12_clock *clk =
+ (struct exynos4x12_clock *)samsung_get_base_clock();
+#else
struct exynos4_clock *clk =
(struct exynos4_clock *)samsung_get_base_clock();
+#endif
writel(CLK_SRC_CPU_VAL, &clk->src_cpu);
@@ -55,7 +64,11 @@ void system_clock_init(void)
writel(CLK_SRC_CAM_VAL, &clk->src_cam);
writel(CLK_SRC_MFC_VAL, &clk->src_mfc);
writel(CLK_SRC_G3D_VAL, &clk->src_g3d);
+ #if IS_ENABLED(CONFIG_TINY4412)
+ writel(CLK_SRC_LCD_VAL, &clk->src_lcd);
+ #else
writel(CLK_SRC_LCD0_VAL, &clk->src_lcd0);
+ #endif
sdelay(0x10000);
@@ -73,7 +86,11 @@ void system_clock_init(void)
writel(CLK_DIV_CAM_VAL, &clk->div_cam);
writel(CLK_DIV_MFC_VAL, &clk->div_mfc);
writel(CLK_DIV_G3D_VAL, &clk->div_g3d);
+ #if IS_ENABLED(CONFIG_TINY4412)
+ writel(CLK_DIV_LCD_VAL, &clk->div_lcd);
+ #else
writel(CLK_DIV_LCD0_VAL, &clk->div_lcd0);
+ #endif
/* Set PLL locktime */
writel(PLL_LOCKTIME, &clk->apll_lock);
@@ -92,3 +109,8 @@ void system_clock_init(void)
sdelay(0x30000);
}
+
+__weak void emmc_boot_clk_div_set(void)
+{
+ ;
+}
2.3.5 arch/arm/mach-exynos/dmc_init_exynos4.c
内存初始化适配，启用交错，交错大小设置为2GB（相当于不交错）
Exynos4412支持两个DDR控制器，并且支持组成双通道，1412版本的核心板只有两颗16bit DDR3（构成一颗32bit DDR3连接到片选Xm1CSn0上），因此在Exynos4412看来实际上只接了一颗DDR3。
diff --git a/arch/arm/mach-exynos/dmc_init_exynos4.c b/arch/arm/mach-exynos/dmc_init_exynos4.c
index ecddc72684..7436eeb098 100644
--- a/arch/arm/mach-exynos/dmc_init_exynos4.c
+++ b/arch/arm/mach-exynos/dmc_init_exynos4.c
@@ -26,7 +26,11 @@
#include <config.h>
#include <asm/arch/dmc.h>
#include "common_setup.h"
+#if IS_ENABLED(CONFIG_TINY4412)
+#include "exynos4412_setup.h"
+#else
#include "exynos4_setup.h"
+#endif
struct mem_timings mem = {
.direct_cmd_msr = {
@@ -123,6 +127,9 @@ static void dmc_init(struct exynos4_dmc *dmc)
writel(mem.memconfig0, &dmc->memconfig0);
writel(mem.memconfig1, &dmc->memconfig1);
+#if IS_ENABLED(CONFIG_TINY4412)
+ writel((1<<31)|0x1F, &dmc->ivcontrol);
+#endif
/* Config Precharge Policy */
writel(mem.prechconfig, &dmc->prechconfig);
2.3.6 arch/arm/mach-exynos/exynos4412_setup.h
新增头文件：arch/arm/mach-exynos/exynos4412_setup.h
主要是定义时钟配置，DDR3时序配置。
diff --git a/arch/arm/mach-exynos/exynos4412_setup.h b/arch/arm/mach-exynos/exynos4412_setup.h
new file mode 100644
index 0000000000..dd9218c2dc
--- /dev/null
+++ b/arch/arm/mach-exynos/exynos4412_setup.h
@@ -0,0 +1,652 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Machine Specific Values for EXYNOS4412 based board
+ *
+ * Copyright (C) 2020 FriendlyARM Electronics Co., Ltd.
+ */
+
+#ifndef _TINY4412_SETUP_H
+#define _TINY4412_SETUP_H
+
+#include <config.h>
+#include <asm/arch/cpu.h>
+
+#ifdef CONFIG_CLK_800_330_165
+#define DRAM_CLK_330
+#endif
+#ifdef CONFIG_CLK_1000_200_200
+#define DRAM_CLK_200
+#endif
+#ifdef CONFIG_CLK_1000_330_165
+#define DRAM_CLK_330
+#endif
+#ifdef CONFIG_CLK_1000_400_200
+#define DRAM_CLK_400
+#endif
+
+/* Bus Configuration Register Address */
+#define ASYNC_CONFIG 0x10010350
+
+/* CLK_SRC_CPU */
+#define MUX_MPLL_USER_SEL_C_FINPLL 0x0
+#define MUX_MPLL_USER_SEL_C_FOUTMPLL 0x1
+#define MUX_HPM_SEL_MOUTAPLL 0x0
+#define MUX_HPM_SEL_SCLKMPLL 0x1
+#define MUX_CORE_SEL_MOUTAPLL 0x0
+#define MUX_CORE_SEL_SCLKMPLL 0x1
+#define MUX_APLL_SEL_FILPLL 0x0
+#define MUX_APLL_SEL_MOUTMPLLFOUT 0x1
+#define CLK_SRC_CPU_VAL ((MUX_MPLL_USER_SEL_C_FOUTMPLL << 24) \
+ | (MUX_HPM_SEL_MOUTAPLL << 20) \
+ | (MUX_CORE_SEL_MOUTAPLL << 16)\
+ | (MUX_APLL_SEL_MOUTMPLLFOUT << 0))
+
+/* CLK_DIV_CPU0 */
+#define CORE2_RATIO 0x0
+#define APLL_RATIO 0x1
+#define PCLK_DBG_RATIO 0x1
+#define ATB_RATIO 0x6
+#define PERIPH_RATIO 0x0
+#define COREM1_RATIO 0x7
+#define COREM0_RATIO 0x3
+#define CORE_RATIO 0x0
+#define CLK_DIV_CPU0_VAL ((CORE2_RATIO << 28) \
+ | (APLL_RATIO << 24) \
+ | (PCLK_DBG_RATIO << 20) \
+ | (ATB_RATIO << 16) \
+ | (PERIPH_RATIO << 12) \
+ | (COREM1_RATIO << 8) \
+ | (COREM0_RATIO << 4) \
+ | (CORE_RATIO << 0))
+
+/* CLK_DIV_CPU1 */
+#define CORES_RATIO 0x5
+#define HPM_RATIO 0x0
+#define COPY_RATIO 0x6
+#define CLK_DIV_CPU1_VAL ((CORES_RATIO<<8) | (HPM_RATIO << 4) | (COPY_RATIO))
+
+/* CLK_SRC_DMC */
+#define MUX_G2D_ACP_SEL_MOUTG2D_ACP_0 0x0
+#define MUX_G2D_ACP_SEL_MOUTG2D_ACP_1 0x1
+#define MUX_G2D_ACP_1_SEL_SCLKEPLL 0x0
+#define MUX_G2D_ACP_1_SEL_SCLKVPLL 0x1
+#define MUX_G2D_ACP_0_SEL_SCLKMPLL 0x0
+#define MUX_G2D_ACP_0_SEL_SCLKAPLL 0x1
+#define MUX_PWI_SEL_XXTI 0x0
+#define MUX_PWI_SEL_XUSBXTI 0x1
+#define MUX_PWI_SEL_SCLK_HDMI24M 0x2
+#define MUX_PWI_SEL_SCLK_USBPHY0 0x3
+#define MUX_PWI_SEL_SCLK_USBPHY1 0x4
+#define MUX_PWI_SEL_SCLK_HDMIPHY 0x5
+#define MUX_PWI_SEL_SCLKMPLL 0x6
+#define MUX_PWI_SEL_SCLKEPLL 0x7
+#define MUX_PWI_SEL_SCLKVPLL 0x8
+#define MUX_MPLL_SEL_FINPLL 0x0
+#define MUX_MPLL_SEL_MOUTMPLLFOUT 0x1
+#define MUX_DPHY_SEL_SCLKMPLL 0x0
+#define MUX_DPHY_SEL_SCLKAPLL 0x1
+#define MUX_DMC_BUS_SEL_SCLKMPLL 0x0
+#define MUX_DMC_BUS_SEL_SCLKAPLL 0x1
+#define MUX_C2C_SEL_SCLKMPLL 0x0
+#define MUX_C2C_SEL_SCLKAPLL 0x1
+#define CLK_SRC_DMC_VAL ((MUX_G2D_ACP_SEL_MOUTG2D_ACP_0 << 28) \
+ | (MUX_G2D_ACP_1_SEL_SCLKEPLL << 24) \
+ | (MUX_G2D_ACP_0_SEL_SCLKMPLL << 20) \
+ | (MUX_PWI_SEL_XUSBXTI << 16) \
+ | (MUX_MPLL_SEL_MOUTMPLLFOUT << 12) \
+ | (MUX_DPHY_SEL_SCLKMPLL << 8) \
+ | (MUX_DMC_BUS_SEL_SCLKMPLL << 4) \
+ | (MUX_C2C_SEL_SCLKMPLL << 0))
+
+/* CLK_DIV_DMC0 */
+#define DMCP_RATIO 0x1
+#define DMCD_RATIO 0x1
+#define DMC_RATIO 0x1
+#define DPHY_RATIO 0x1
+#define ACP_PCLK_RATIO 0x1
+#define ACP_RATIO 0x3
+#define CLK_DIV_DMC0_VAL ((DMCP_RATIO << 20) \
+ | (DMCD_RATIO << 16) \
+ | (DMC_RATIO << 12) \
+ | (DPHY_RATIO << 8) \
+ | (ACP_PCLK_RATIO << 4) \
+ | (ACP_RATIO << 0))
+
+/* CLK_DIV_DMC1 */
+#define DPM_RATIO 0x1
+#define DVSEM_RATIO 0x1
+#define C2C_ACLK_RATIO 0x1
+#define PWI_RATIO 0x7
+#define C2C_RATIO 0x1
+#define G2D_ACP_RATIO 0x3
+#define CLK_DIV_DMC1_VAL ((DPM_RATIO << 24) \
+ | (DVSEM_RATIO << 16) \
+ | (C2C_ACLK_RATIO << 12) \
+ | (PWI_RATIO << 8) \
+ | (C2C_RATIO << 4) \
+ | (G2D_ACP_RATIO << 0))
+
+/* CLK_SRC_TOP0 */
+#define MUX_ONENAND_SEL_ACLK_133 0x0
+#define MUX_ONENAND_SEL_ACLK_160 0x1
+#define MUX_ACLK_133_SEL_SCLKMPLL 0x0
+#define MUX_ACLK_133_SEL_SCLKAPLL 0x1
+#define MUX_ACLK_160_SEL_SCLKMPLL 0x0
+#define MUX_ACLK_160_SEL_SCLKAPLL 0x1
+#define MUX_ACLK_100_SEL_SCLKMPLL 0x0
+#define MUX_ACLK_100_SEL_SCLKAPLL 0x1
+#define MUX_ACLK_200_SEL_SCLKMPLL 0x0
+#define MUX_ACLK_200_SEL_SCLKAPLL 0x1
+#define MUX_VPLL_SEL_FINPLL 0x0
+#define MUX_VPLL_SEL_FOUTVPLL 0x1
+#define MUX_EPLL_SEL_FINPLL 0x0
+#define MUX_EPLL_SEL_FOUTEPLL 0x1
+#define MUX_ONENAND_1_SEL_MOUTONENAND 0x0
+#define MUX_ONENAND_1_SEL_SCLKVPLL 0x1
+#define CLK_SRC_TOP0_VAL ((MUX_ONENAND_SEL_ACLK_133 << 28) \
+ | (MUX_ACLK_133_SEL_SCLKMPLL << 24) \
+ | (MUX_ACLK_160_SEL_SCLKMPLL << 20) \
+ | (MUX_ACLK_100_SEL_SCLKMPLL << 16) \
+ | (MUX_ACLK_200_SEL_SCLKMPLL << 12) \
+ | (MUX_VPLL_SEL_FOUTVPLL << 8) \
+ | (MUX_EPLL_SEL_FOUTEPLL << 4)\
+ | (MUX_ONENAND_1_SEL_MOUTONENAND << 0))
+
+/* CLK_SRC_TOP1 */
+#define MUX_ACLK_400_MCUISP_SUB_SEL_FINPLL 0x0
+#define MUX_ACLK_400_MCUISP_SUB_SEL_DIVOUT_ACLK_400_MCUISP 0x1
+#define MUX_ACLK_200_SUB_SEL_FINPLL 0x0
+#define MUX_ACLK_200_SUB_SEL_DIVOUT_ACLK_200 0x1
+#define MUX_ACLK_266_GPS_SUB_SEL_FINPLL 0x0
+#define MUX_ACLK_266_GPS_SUB_SEL_DIVOUT_ACLK_266_GPS 0x1
+#define MUX_MPLL_USER_SEL_T_FINPLL 0x0
+#define MUX_MPLL_USER_SEL_T_SCLKMPLL 0x1
+#define MUX_ACLK_400_MCUISP_SEL_SCLKMPLL_USER_T 0x0
+#define MUX_ACLK_400_MCUISP_SEL_SCLKAPLL 0x1
+#define MUX_ACLK_266_GPS_SEL_SCLKMPLL_USER_T 0x0
+#define MUX_ACLK_266_GPS_SEL_SCLKAPLL 0x0
+#define CLK_SRC_TOP1_VAL ((MUX_ACLK_400_MCUISP_SUB_SEL_DIVOUT_ACLK_400_MCUISP << 24) \
+ | (MUX_ACLK_200_SUB_SEL_DIVOUT_ACLK_200 << 20) \
+ | (MUX_ACLK_266_GPS_SUB_SEL_DIVOUT_ACLK_266_GPS << 16) \
+ | (MUX_MPLL_USER_SEL_T_SCLKMPLL << 12) \
+ | (MUX_ACLK_400_MCUISP_SEL_SCLKMPLL_USER_T << 8) \
+ | (MUX_ACLK_266_GPS_SEL_SCLKMPLL_USER_T << 4))
+
+/* CLK_DIV_TOP */
+#define ACLK_400_MCUISP_RATIO 0x0
+#define ACLK_266_GPS_RATIO 0x0
+#define ONENAND_RATIO 0x1
+#define ACLK_133_RATIO 0x5
+#define ACLK_160_RATIO 0x4
+#define ACLK_100_RATIO 0x7
+#define ACLK_200_RATIO 0x0
+#define CLK_DIV_TOP_VAL ((ACLK_400_MCUISP_RATIO << 24) \
+ | (ACLK_266_GPS_RATIO << 20) \
+ | (ONENAND_RATIO << 16) \
+ | (ACLK_133_RATIO << 12)\
+ | (ACLK_160_RATIO << 8) \
+ | (ACLK_100_RATIO << 4) \
+ | (ACLK_200_RATIO << 0))
+
+/* CLK_SRC_LEFTBUS */
+#define MUX_MPLL_USER_SEL_L_FINPLL 0x0
+#define MUX_MPLL_USER_SEL_L_FOUTMPLL 0x1
+#define MUX_GDL_SEL_SCLKMPLL 0x0
+#define MUX_GDL_SEL_SCLKAPLL 0x1
+#define CLK_SRC_LEFTBUS_VAL ((MUX_MPLL_USER_SEL_L_FOUTMPLL << 4) \
+ | (MUX_GDL_SEL_SCLKMPLL << 0))
+
+/* CLK_DIV_LEFTBUS */
+#define GPL_RATIO 0x1
+#define GDL_RATIO 0x3
+#define CLK_DIV_LEFTBUS_VAL ((GPL_RATIO << 4) | (GDL_RATIO))
+
+/* CLK_SRC_RIGHTBUS */
+#define MUX_MPLL_USER_SEL_R_FINPLL 0x0
+#define MUX_MPLL_USER_SEL_R_FOUTMPLL 0x1
+#define MUX_GDR_SEL_SCLKMPLL 0x0
+#define MUX_GDR_SEL_SCLKAPLL 0x1
+#define CLK_SRC_RIGHTBUS_VAL ((MUX_MPLL_USER_SEL_R_FOUTMPLL << 4) \
+ | (MUX_GDR_SEL_SCLKMPLL << 0))
+
+/* CLK_DIV_RIGHTBUS */
+#define GPR_RATIO 0x1
+#define GDR_RATIO 0x3
+#define CLK_DIV_RIGHTBUS_VAL ((GPR_RATIO << 4) | (GDR_RATIO))
+
+/* CLK_SRS_FSYS: 6 = SCLKMPLL */
+#define SATA_SEL_SCLKMPLL 0
+#define SATA_SEL_SCLKAPLL 1
+
+#define MMC_SEL_XXTI 0
+#define MMC_SEL_XUSBXTI 1
+#define MMC_SEL_SCLK_HDMI24M 2
+#define MMC_SEL_SCLK_USBPHY0 3
+#define MMC_SEL_SCLK_USBPHY1 4
+#define MMC_SEL_SCLK_HDMIPHY 5
+#define MMC_SEL_SCLKMPLL 6
+#define MMC_SEL_SCLKEPLL 7
+#define MMC_SEL_SCLKVPLL 8
+
+#define MMCC0_SEL MMC_SEL_SCLKMPLL
+#define MMCC1_SEL MMC_SEL_SCLKMPLL
+#define MMCC2_SEL MMC_SEL_SCLKMPLL
+#define MMCC3_SEL MMC_SEL_SCLKMPLL
+#define MMCC4_SEL MMC_SEL_SCLKMPLL
+#define CLK_SRC_FSYS_VAL ((SATA_SEL_SCLKMPLL << 24) \
+ | (MMCC4_SEL << 16) \
+ | (MMCC3_SEL << 12) \
+ | (MMCC2_SEL << 8) \
+ | (MMCC1_SEL << 4) \
+ | (MMCC0_SEL << 0))
+
+/* SCLK_MMC[0-4] = MOUTMMC[0-4]/(MMC[0-4]_RATIO + 1)/(MMC[0-4]_PRE_RATIO +1) */
+/* CLK_DIV_FSYS1 */
+#define MMC0_RATIO 0xF
+#define MMC0_PRE_RATIO 0x0
+#define MMC1_RATIO 0xF
+#define MMC1_PRE_RATIO 0x0
+#define CLK_DIV_FSYS1_VAL ((MMC1_PRE_RATIO << 24) \
+ | (MMC1_RATIO << 16) \
+ | (MMC0_PRE_RATIO << 8) \
+ | (MMC0_RATIO << 0))
+
+/* CLK_DIV_FSYS2 */
+#define MMC2_RATIO 0x7
+#define MMC2_PRE_RATIO 0x0
+#define MMC3_RATIO 0x7
+#define MMC3_PRE_RATIO 0x4
+#define CLK_DIV_FSYS2_VAL ((MMC3_PRE_RATIO << 24) \
+ | (MMC3_RATIO << 16) \
+ | (MMC2_PRE_RATIO << 8) \
+ | (MMC2_RATIO << 0))
+
+/* CLK_DIV_FSYS3 */
+#define MMC4_RATIO 0xF
+#define MMC4_PRE_RATIO 0x0
+#define CLK_DIV_FSYS3_VAL ((MMC4_PRE_RATIO << 8) \
+ | (MMC4_RATIO << 0))
+
+/* CLK_SRC_PERIL0 */
+#define UART_SEL_XXTI 0
+#define UART_SEL_XUSBXTI 1
+#define UART_SEL_SCLK_HDMI24M 2
+#define UART_SEL_SCLK_USBPHY0 3
+#define UART_SEL_SCLK_USBPHY1 4
+#define UART_SEL_SCLK_HDMIPHY 5
+#define UART_SEL_SCLKMPLL 6
+#define UART_SEL_SCLKEPLL 7
+#define UART_SEL_SCLKVPLL 8
+
+#define UART0_SEL UART_SEL_SCLKMPLL
+#define UART1_SEL UART_SEL_SCLKMPLL
+#define UART2_SEL UART_SEL_SCLKMPLL
+#define UART3_SEL UART_SEL_SCLKMPLL
+#define UART4_SEL UART_SEL_SCLKMPLL
+#define CLK_SRC_PERIL0_VAL ((UART4_SEL << 16) \
+ | (UART3_SEL << 12) \
+ | (UART2_SEL << 8) \
+ | (UART1_SEL << 4) \
+ | (UART0_SEL << 0))
+
+/* SCLK_UART[0-4] = MOUTUART[0-4]/(UART[0-4]_RATIO + 1) */
+/* CLK_DIV_PERIL0 */
+#define UART0_RATIO 7
+#define UART1_RATIO 7
+#define UART2_RATIO 7
+#define UART3_RATIO 7
+#define UART4_RATIO 7
+#define CLK_DIV_PERIL0_VAL ((UART4_RATIO << 16) \
+ | (UART3_RATIO << 12) \
+ | (UART2_RATIO << 8) \
+ | (UART1_RATIO << 4) \
+ | (UART0_RATIO << 0))
+
+/* Clock Source CAM/FIMC */
+/* CLK_SRC_CAM */
+#define CAM0_SEL_XUSBXTI 1
+#define CAM1_SEL_XUSBXTI 1
+#define CSIS0_SEL_XUSBXTI 1
+#define CSIS1_SEL_XUSBXTI 1
+
+#define FIMC_SEL_SCLKMPLL 6
+#define FIMC0_LCLK_SEL FIMC_SEL_SCLKMPLL
+#define FIMC1_LCLK_SEL FIMC_SEL_SCLKMPLL
+#define FIMC2_LCLK_SEL FIMC_SEL_SCLKMPLL
+#define FIMC3_LCLK_SEL FIMC_SEL_SCLKMPLL
+
+#define CLK_SRC_CAM_VAL ((CSIS1_SEL_XUSBXTI << 28) \
+ | (CSIS0_SEL_XUSBXTI << 24) \
+ | (CAM1_SEL_XUSBXTI << 20) \
+ | (CAM0_SEL_XUSBXTI << 16) \
+ | (FIMC3_LCLK_SEL << 12) \
+ | (FIMC2_LCLK_SEL << 8) \
+ | (FIMC1_LCLK_SEL << 4) \
+ | (FIMC0_LCLK_SEL << 0))
+
+/* SCLK CAM */
+/* CLK_DIV_CAM */
+#define FIMC0_LCLK_RATIO 4
+#define FIMC1_LCLK_RATIO 4
+#define FIMC2_LCLK_RATIO 4
+#define FIMC3_LCLK_RATIO 4
+#define CLK_DIV_CAM_VAL ((FIMC3_LCLK_RATIO << 12) \
+ | (FIMC2_LCLK_RATIO << 8) \
+ | (FIMC1_LCLK_RATIO << 4) \
+ | (FIMC0_LCLK_RATIO << 0))
+
+/* SCLK MFC */
+/* CLK_SRC_MFC */
+#define MFC_SEL_MPLL 0
+#define MOUTMFC_0 0
+#define MFC_SEL MOUTMFC_0
+#define MFC_0_SEL MFC_SEL_MPLL
+#define CLK_SRC_MFC_VAL ((MFC_SEL << 8) | (MFC_0_SEL))
+
+
+/* CLK_DIV_MFC */
+#define MFC_RATIO 3
+#define CLK_DIV_MFC_VAL (MFC_RATIO)
+
+/* SCLK G3D */
+/* CLK_SRC_G3D */
+#define G3D_SEL_MPLL 0
+#define MOUTG3D_0 0
+#define G3D_SEL MOUTG3D_0
+#define G3D_0_SEL G3D_SEL_MPLL
+#define CLK_SRC_G3D_VAL ((G3D_SEL << 8) | (G3D_0_SEL))
+
+/* CLK_DIV_G3D */
+#define G3D_RATIO 1
+#define CLK_DIV_G3D_VAL (G3D_RATIO)
+
+/* SCLK LCD */
+/* CLK_SRC_LCD */
+#define FIMD_SEL_SCLKMPLL 6
+#define MDNIE0_SEL_XUSBXTI 1
+#define MDNIE_PWM0_SEL_XUSBXTI 1
+#define MIPI0_SEL_XUSBXTI 1
+#define CLK_SRC_LCD_VAL ((MIPI0_SEL_XUSBXTI << 12) \
+ | (MDNIE_PWM0_SEL_XUSBXTI << 8) \
+ | (MDNIE0_SEL_XUSBXTI << 4) \
+ | (FIMD_SEL_SCLKMPLL << 0))
+
+/* CLK_DIV_LCD */
+#define MIPI0_PRE_RATIO 0xF
+#define MIPI0_RATIO 0xF
+#define MDNIE_PWM0_PRE_RATIO 0xF
+#define MDNIE_PWM0_RATIO 0xF
+#define MDNIE0_RATIO 0xF
+#define FIMD0_RATIO 0xF
+#define CLK_DIV_LCD_VAL ((MIPI0_PRE_RATIO << 20) \
+ | (MIPI0_RATIO << 16) \
+ | (MDNIE_PWM0_PRE_RATIO << 12) \
+ | (MDNIE_PWM0_RATIO << 8) \
+ | (MDNIE0_RATIO << 4) \
+ | (FIMD0_RATIO << 0))
+
+/* Required period to generate a stable clock output */
+/* PLL_LOCK_TIME */
+#define PLL_LOCKTIME 0x1C20
+
+/* PLL Values */
+#define DISABLE 0
+#define ENABLE 1
+#define SET_PLL(mdiv, pdiv, sdiv) ((ENABLE << 31)\
+ | (mdiv << 16) \
+ | (pdiv << 8) \
+ | (sdiv << 0))
+
+/* APLL_CON0 */
+#define APLL_MDIV 175
+#define APLL_PDIV 3
+#define APLL_SDIV 0
+#define APLL_CON0_VAL SET_PLL(APLL_MDIV, APLL_PDIV, APLL_SDIV)
+
+/* APLL_CON1 */
+#define APLL_RESV1 0x0
+#define APLL_RESV0 0x1
+#define APLL_BYPASS 0x0
+#define APLL_DCC_ENB 0x0
+#define APLL_AFC_ENB 0x0
+#define APLL_FEED_EN 0x0
+#define APLL_LOCK_CON_OUT 0x0
+#define APLL_LOCK_CON_IN 0x3
+#define APLL_LOCK_CON_DLY 0x8
+#define APLL_AFC 0x0
+#define APLL_CON1_VAL ((APLL_RESV1 << 24) \
+ | (APLL_RESV0 << 23) \
+ | (APLL_BYPASS << 22) \
+ | (APLL_DCC_ENB << 21) \
+ | (APLL_AFC_ENB << 20) \
+ | (APLL_FEED_EN << 16) \
+ | (APLL_LOCK_CON_OUT << 14) \
+ | (APLL_LOCK_CON_IN << 12) \
+ | (APLL_LOCK_CON_DLY << 8) \
+ | (APLL_AFC << 0))
+
+/* MPLL_CON0 */
+#define MPLL_MDIV 100
+#define MPLL_PDIV 3
+#define MPLL_SDIV 0
+#define MPLL_CON0_VAL SET_PLL(MPLL_MDIV, MPLL_PDIV, MPLL_SDIV)
+
+/* MPLL_CON1 */
+#define MPLL_RESV1 0x0
+#define MPLL_RESV0 0x1
+#define MPLL_BYPASS 0x0
+#define MPLL_DCC_ENB 0x0
+#define MPLL_AFC_ENB 0x0
+#define MPLL_FEED_EN 0x0
+#define MPLL_LOCK_CON_OUT 0x0
+#define MPLL_LOCK_CON_IN 0x3
+#define MPLL_LOCK_CON_DLY 0x8
+#define MPLL_AFC 0x0
+#define MPLL_CON1_VAL ((MPLL_RESV1 << 24) \
+ | (MPLL_RESV0 << 23) \
+ | (MPLL_BYPASS << 22) \
+ | (MPLL_DCC_ENB << 21) \
+ | (MPLL_AFC_ENB << 20) \
+ | (MPLL_FEED_EN << 16) \
+ | (MPLL_LOCK_CON_OUT << 14) \
+ | (MPLL_LOCK_CON_IN << 12) \
+ | (MPLL_LOCK_CON_DLY << 8) \
+ | (MPLL_AFC << 0))
+
+/* EPLL_CON0 */
+#define EPLL_MDIV 0x30
+#define EPLL_PDIV 0x3
+#define EPLL_SDIV 0x2
+#define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV)
+
+/* EPLL_CON1 */
+#define EPLL_K 0x0
+#define EPLL_CON1_VAL (EPLL_K >> 0)
+
+/* VPLL_CON0 */
+#define VPLL_MDIV 0x35
+#define VPLL_PDIV 0x3
+#define VPLL_SDIV 0x2
+#define VPLL_CON0_VAL SET_PLL(VPLL_MDIV, VPLL_PDIV, VPLL_SDIV)
+
+/* VPLL_CON1 */
+#define VPLL_SSCG_EN DISABLE
+#define VPLL_SEL_PF_DN_SPREAD 0x0
+#define VPLL_MRR 0x11
+#define VPLL_MFR 0x0
+#define VPLL_K 0x400
+#define VPLL_CON1_VAL ((VPLL_SSCG_EN << 31)\
+ | (VPLL_SEL_PF_DN_SPREAD << 29) \
+ | (VPLL_MRR << 24) \
+ | (VPLL_MFR << 16) \
+ | (VPLL_K << 0))
+
+/* DMC */
+#define DIRECT_CMD_NOP 0x07000000
+#define DIRECT_CMD_ZQ 0x0a000000
+#define DIRECT_CMD_CHIP1_SHIFT (1 << 20)
+#define MEM_TIMINGS_MSR_COUNT 4
+#define CTRL_START (1 << 0)
+#define CTRL_DLL_ON (1 << 1)
+#define AREF_EN (1 << 5)
+#define DRV_TYPE (1 << 6)
+
+struct mem_timings {
+ unsigned direct_cmd_msr[MEM_TIMINGS_MSR_COUNT];
+ unsigned timingref;
+ unsigned timingrow;
+ unsigned timingdata;
+ unsigned timingpower;
+ unsigned zqcontrol;
+ unsigned control0;
+ unsigned control1;
+ unsigned control2;
+ unsigned concontrol;
+ unsigned prechconfig;
+ unsigned memcontrol;
+ unsigned memconfig0;
+ unsigned memconfig1;
+ unsigned dll_resync;
+ unsigned dll_on;
+};
+
+/* MIU */
+/* MIU Config Register Offsets*/
+#define APB_SFR_INTERLEAVE_CONF_OFFSET 0x400
+#define APB_SFR_ARBRITATION_CONF_OFFSET 0xC00
+#define ABP_SFR_SLV_ADDRMAP_CONF_OFFSET 0x800
+#define ABP_SFR_INTERLEAVE_ADDRMAP_START_OFFSET 0x808
+#define ABP_SFR_INTERLEAVE_ADDRMAP_END_OFFSET 0x810
+#define ABP_SFR_SLV0_SINGLE_ADDRMAP_START_OFFSET 0x818
+#define ABP_SFR_SLV0_SINGLE_ADDRMAP_END_OFFSET 0x820
+#define ABP_SFR_SLV1_SINGLE_ADDRMAP_START_OFFSET 0x828
+#define ABP_SFR_SLV1_SINGLE_ADDRMAP_END_OFFSET 0x830
+
+#ifdef CONFIG_TINY4412
+/* Interleave: 2Bit, Interleave_bit1: 0x15, Interleave_bit0: 0x7 */
+#define APB_SFR_INTERLEAVE_CONF_VAL 0x20001507
+#define APB_SFR_ARBRITATION_CONF_VAL 0x00000001
+#endif
+
+#define INTERLEAVE_ADDR_MAP_START_ADDR 0x40000000
+#define INTERLEAVE_ADDR_MAP_END_ADDR 0xbfffffff
+#define INTERLEAVE_ADDR_MAP_EN 0x00000001
+
+#ifdef CONFIG_MIU_1BIT_INTERLEAVED
+/* Interleave_bit0: 0xC*/
+#define APB_SFR_INTERLEAVE_CONF_VAL 0x0000000c
+#endif
+#ifdef CONFIG_MIU_2BIT_INTERLEAVED
+/* Interleave: 2Bit, Interleave_bit1: 0x15, Interleave_bit0: 0xc */
+#define APB_SFR_INTERLEAVE_CONF_VAL 0x2000150c
+#endif
+#define SLAVE0_SINGLE_ADDR_MAP_START_ADDR 0x40000000
+#define SLAVE0_SINGLE_ADDR_MAP_END_ADDR 0x7fffffff
+#define SLAVE1_SINGLE_ADDR_MAP_START_ADDR 0x80000000
+#define SLAVE1_SINGLE_ADDR_MAP_END_ADDR 0xbfffffff
+/* Enable SME0 and SME1*/
+#define APB_SFR_SLV_ADDR_MAP_CONF_VAL 0x00000006
+
+#define FORCE_DLL_RESYNC 3
+#define DLL_CONTROL_ON 1
+
+#define DIRECT_CMD1 0x00020000
+#define DIRECT_CMD2 0x00030000
+#define DIRECT_CMD3 0x00010002
+#define DIRECT_CMD4 0x00000328
+
+#define CTRL_ZQ_MODE_NOTERM (0x1 << 0)
+#define CTRL_ZQ_START (0x1 << 1)
+#define CTRL_ZQ_FORCE (0x0 << 2)
+#define CTRL_ZQ_DIV (0 << 4)
+#define CTRL_ZQ_MODE_DDS (0x4 << 8)
+#define CTRL_ZQ_MODE_TERM (0x1 << 11)
+#define CTRL_ZQ_FORCE_IMPN (0x5 << 14)
+#define CTRL_ZQ_FORCE_IMPP (0x2 << 17)
+#define CTRL_DCC (0xE38 << 20)
+#define ZQ_CONTROL_VAL (CTRL_ZQ_MODE_NOTERM | CTRL_ZQ_START | CTRL_ZQ_FORCE\
+ | CTRL_ZQ_DIV | CTRL_ZQ_MODE_DDS\
+ | CTRL_ZQ_MODE_TERM | CTRL_ZQ_FORCE_IMPN\
+ | CTRL_ZQ_FORCE_IMPP | CTRL_DCC)
+
+#define ASYNC (0 << 0)
+#define CLK_RATIO (1 << 1)
+#define DIV_PIPE (1 << 3)
+#define AWR_ON (1 << 4)
+#define AREF_DISABLE (0 << 5)
+#define DRV_TYPE_DISABLE (0 << 6)
+#define CHIP0_NOT_EMPTY (0 << 8)
+#define CHIP1_NOT_EMPTY (0 << 9)
+#define DQ_SWAP_DISABLE (0 << 10)
+#define QOS_FAST_DISABLE (0 << 11)
+#define RD_FETCH (0x3 << 12)
+#define TIMEOUT_LEVEL0 (0xFFF << 16)
+#define CONCONTROL_VAL (ASYNC | CLK_RATIO | DIV_PIPE | AWR_ON\
+ | AREF_DISABLE | DRV_TYPE_DISABLE\
+ | CHIP0_NOT_EMPTY | CHIP1_NOT_EMPTY\
+ | DQ_SWAP_DISABLE | QOS_FAST_DISABLE\
+ | RD_FETCH | TIMEOUT_LEVEL0)
+
+#define CLK_STOP_DISABLE (0 << 1)
+#define DPWRDN_DISABLE (0 << 2)
+#define DPWRDN_TYPE (0 << 3)
+#define TP_DISABLE (0 << 4)
+#define DSREF_DIABLE (0 << 5)
+#define ADD_LAT_PALL (1 << 6)
+#define MEM_TYPE_DDR3 (0x6 << 8)
+#define MEM_WIDTH_32 (0x2 << 12)
+#define NUM_CHIP_2 (0 << 16)
+#define BL_8 (0x3 << 20)
+#define MEMCONTROL_VAL (CLK_STOP_DISABLE | DPWRDN_DISABLE\
+ | DPWRDN_TYPE | TP_DISABLE | DSREF_DIABLE\
+ | ADD_LAT_PALL | MEM_TYPE_DDR3 | MEM_WIDTH_32\
+ | NUM_CHIP_2 | BL_8)
+
+
+#define CHIP_BANK_8 (0x3 << 0)
+#define CHIP_ROW_14 (0x3 << 4)
+#define CHIP_COL_10 (0x3 << 8)
+#define CHIP_MAP_INTERLEAVED (1 << 12)
+#define CHIP_MASK (0xC0 << 16)
+#ifdef CONFIG_MIU_LINEAR
+#define CHIP0_BASE (0x40 << 24)
+#define CHIP1_BASE (0x60 << 24)
+#else
+#define CHIP0_BASE (0x40 << 24)
+#define CHIP1_BASE (0x80 << 24)
+#endif
+#define MEMCONFIG0_VAL (CHIP_BANK_8 | CHIP_ROW_14 | CHIP_COL_10\
+ | CHIP_MAP_INTERLEAVED | CHIP_MASK | CHIP0_BASE)
+#define MEMCONFIG1_VAL (CHIP_BANK_8 | CHIP_ROW_14 | CHIP_COL_10\
+ | CHIP_MAP_INTERLEAVED | CHIP_MASK | CHIP1_BASE)
+
+#define TP_CNT (0xff << 24)
+#define PRECHCONFIG TP_CNT
+
+#define CTRL_OFF (0 << 0)
+#define CTRL_DLL_OFF (0 << 1)
+#define CTRL_HALF (0 << 2)
+#define CTRL_DFDQS (1 << 3)
+#define DQS_DELAY (0 << 4)
+#define CTRL_START_POINT (0x10 << 8)
+#define CTRL_INC (0x10 << 16)
+#define CTRL_FORCE (0x71 << 24)
+#define CONTROL0_VAL (CTRL_OFF | CTRL_DLL_OFF | CTRL_HALF\
+ | CTRL_DFDQS | DQS_DELAY | CTRL_START_POINT\
+ | CTRL_INC | CTRL_FORCE)
+
+#define CTRL_SHIFTC (0x6 << 0)
+#define CTRL_REF (8 << 4)
+#define CTRL_SHGATE (1 << 29)
+#define TERM_READ_EN (1 << 30)
+#define TERM_WRITE_EN (1 << 31)
+#define CONTROL1_VAL (CTRL_SHIFTC | CTRL_REF | CTRL_SHGATE\
+ | TERM_READ_EN | TERM_WRITE_EN)
+
+#define CONTROL2_VAL 0x00000000
+
+#define TIMINGREF_VAL 0x000000BB
+#define TIMINGROW_VAL 0x7a46654f
+#define TIMINGDATA_VAL 0x46400506
+#define TIMINGPOWER_VAL 0x52000A3C
+#endif
2.3.7 arch/arm/mach-exynos/lowlevel_init.c
修改DEBUG_UART引脚复用配置，由UART3改为UART0。
此处的串口仅仅是早期调试串口，启动时会打印“<debug_uart>”，真正的U-Boot命令行终端使用的串口由设备树定义，位于/aliases/节点的console属性。
diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c
index 97d6ca8fc2..29682d5135 100644
--- a/arch/arm/mach-exynos/lowlevel_init.c
+++ b/arch/arm/mach-exynos/lowlevel_init.c
@@ -220,7 +220,11 @@ int do_lowlevel_init(void)
#ifdef CONFIG_DEBUG_UART
#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT)) || \
!defined(CONFIG_SPL_BUILD)
+ #if IS_ENABLED(CONFIG_TINY4412)
+ exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
+ #else
exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
+ #endif
debug_uart_init();
#endif
#endif
2.3.8 arch/arm/mach-exynos/tzpc.c
修改TrustZone配置。
diff --git a/arch/arm/mach-exynos/tzpc.c b/arch/arm/mach-exynos/tzpc.c
index abe8e7f458..3134a27f98 100644
--- a/arch/arm/mach-exynos/tzpc.c
+++ b/arch/arm/mach-exynos/tzpc.c
@@ -34,7 +34,11 @@ void tzpc_init(void)
if (cpu_is_exynos5() && (addr == end))
break;
+ #if IS_ENABLED(CONFIG_TINY4412)
+ writel(0xBF, &tzpc->decprot2set);
+ #else
writel(DECPROTXSET, &tzpc->decprot2set);
+ #endif
writel(DECPROTXSET, &tzpc->decprot3set);
}
}
2.3.9 board/samsung/tiny4412/Kconfig
在board/samsung目录下新建tiny4412板子的文件夹。
添加板子相关配置项定义。
diff --git a/board/samsung/tiny4412/Kconfig b/board/samsung/tiny4412/Kconfig
new file mode 100644
index 0000000000..044c4f84ec
--- /dev/null
+++ b/board/samsung/tiny4412/Kconfig
@@ -0,0 +1,16 @@
+if TARGET_TINY4412
+
+config TINY4412
+ bool
+ default y
+
+config SYS_BOARD
+ default "tiny4412"
+
+config SYS_VENDOR
+ default "samsung"
+
+config SYS_CONFIG_NAME
+ default "tiny4412"
+
+endif
2.3.10 board/samsung/tiny4412/MAINTAINERS
在board/samsung目录下新建tiny4412板子的文件夹。
添加维护者相关信息。
diff --git a/board/samsung/tiny4412/MAINTAINERS b/board/samsung/tiny4412/MAINTAINERS
new file mode 100644
index 0000000000..e68fdff08a
--- /dev/null
+++ b/board/samsung/tiny4412/MAINTAINERS
@@ -0,0 +1,6 @@
+TINY4412 BOARD
+M: xkwy.xkwy <xkwy001@gmail.com>
+S: Maintained
+F: board/samsung/tiny4412/
+F: include/configs/tiny4412.h
+F: configs/tiny4412_defconfig
2.3.11 board/samsung/tiny4412/Makefile
在board/samsung目录下新建tiny4412板子的文件夹。
添加编译脚本，主要加入编译板级实现的接口tiny4412.c，以及编译制作tiny4412-spl.bin的工具。
diff --git a/board/samsung/tiny4412/Makefile b/board/samsung/tiny4412/Makefile
new file mode 100644
index 0000000000..07170d7803
--- /dev/null
+++ b/board/samsung/tiny4412/Makefile
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2020 xkwy2018.cn
+
+ifdef CONFIG_SPL_BUILD
+# necessary to create built-in.o
+obj- := __dummy__.o
+
+hostprogs-y := tools/mktiny4412spl
+always := $(hostprogs-y)
+else
+obj-y += tiny4412.o
+endif
2.3.12 board/samsung/tiny4412/tiny4412.c
在board/samsung目录下新建tiny4412板子的文件夹。
添加板级接口，如获取、设置板子类型，exynos_init等。
diff --git a/board/samsung/tiny4412/tiny4412.c b/board/samsung/tiny4412/tiny4412.c
new file mode 100644
index 0000000000..2e2bec9ce8
--- /dev/null
+++ b/board/samsung/tiny4412/tiny4412.c
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 xkwy2018.cn
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_BOARD_TYPES
+void set_board_type(void)
+{
+ gd->board_type = 0x1506;
+}
+
+void set_board_revision(void)
+{
+ /*
+ * Revision already set by set_board_type() because it can be
+ * executed early.
+ */
+}
+
+const char *get_board_type(void)
+{
+ return "1506";
+}
+#endif
+
+u32 get_board_rev(void)
+{
+ return 0;
+}
+
+int exynos_init(void)
+{
+ return 0;
+}
2.3.13 board/samsung/tiny4412/tools/mktiny4412spl.c
在board/samsung/tiny4412目录下新建tools文件夹。
添加制作tiny4412-spl.bin的工具。
原始编译出来的spl/u-boot-spl.bin直接烧录到SD卡或eMMC中无法运行，需要使用这个工具加个文件头和校验才行。
本工具将u-boot-spl.bin截断或补齐14KB并计算校验和作为bl2，然后在它前面放8KB的bl1程序（E4412_N.bl1.bin）。
diff --git a/board/samsung/tiny4412/tools/mktiny4412spl.c b/board/samsung/tiny4412/tools/mktiny4412spl.c
new file mode 100644
index 0000000000..d7e4913f63
--- /dev/null
+++ b/board/samsung/tiny4412/tools/mktiny4412spl.c
@@ -0,0 +1,446 @@
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <string.h>
+
+#define BL2_OFFSET (8*1024)
+#define BL2_SIZE (14*1024)
+
+/*
+ * Requirement:
+ * IROM code reads first 14K bytes from boot device.
+ * It then calculates the checksum of 14K-4 bytes and compare with data at
+ * 14K-4 offset.
+ *
+ * This function takes two filenames:
+ * IN "u-boot-spl.bin" and
+ * OUT "$(BOARD)-spl.bin as filenames.
+ * It reads the "u-boot-spl.bin" in 14K buffer.
+ * It calculates checksum of 14K-4 Bytes and stores at 14K-4 offset in buffer.
+ * It writes the buffer to "$(BOARD)-spl.bin" file.
+ */
+
+static unsigned char buf[BL2_OFFSET+BL2_SIZE] = { /* E4412_N.bl1.bin */
+ 0xA3,0x69,0xD3,0x18,0xE9,0x7D,0xB9,0x66,0xD1,0x6B,0xD5,0x6E,0xD4,0x79,0xA6,0x79,
+ 0x07,0x00,0x00,0xEA,0xFE,0xFF,0xFF,0xEA,0xFE,0xFF,0xFF,0xEA,0xFE,0xFF,0xFF,0xEA,
+ 0xFE,0xFF,0xFF,0xEA,0xFE,0xFF,0xFF,0xEA,0xFE,0xFF,0xFF,0xEA,0xFE,0xFF,0xFF,0xEA,
+ 0xFE,0xFF,0xFF,0xEA,0xDC,0x00,0x9F,0xE5,0x00,0x00,0x90,0xE5,0x02,0x11,0xA0,0xE3,
+ 0x01,0x00,0x10,0xE1,0x24,0x00,0x00,0x0A,0xCC,0x00,0x9F,0xE5,0x00,0x00,0x90,0xE5,
+ 0x01,0x00,0x10,0xE3,0x20,0x00,0x00,0x0A,0xC0,0x00,0x9F,0xE5,0x00,0x00,0x90,0xE5,
+ 0x03,0x00,0x00,0xE2,0x03,0x00,0x30,0xE3,0x04,0x00,0x00,0x0A,0xB0,0x00,0x9F,0xE5,
+ 0x00,0x00,0x90,0xE5,0x01,0x00,0x10,0xE3,0x00,0x00,0x00,0x0A,0x16,0x00,0x00,0xEA,
+ 0xA0,0x00,0x9F,0xE5,0x00,0x00,0x90,0xE5,0x03,0x00,0x00,0xE2,0x03,0x00,0x30,0xE3,
+ 0x04,0x00,0x00,0x0A,0x90,0x00,0x9F,0xE5,0x00,0x00,0x90,0xE5,0x01,0x00,0x10,0xE3,
+ 0x00,0x00,0x00,0x0A,0x0C,0x00,0x00,0xEA,0x80,0x20,0x9F,0xE5,0x00,0x40,0x92,0xE5,
+ 0x7C,0x20,0x9F,0xE5,0x00,0x50,0x92,0xE5,0x78,0x60,0x9F,0xE5,0x06,0x00,0x54,0xE1,
+ 0x05,0xF0,0xA0,0x01,0x70,0x00,0x9F,0xE5,0x00,0x00,0x90,0xE5,0x07,0x00,0x00,0xE2,
+ 0x07,0x00,0x30,0xE3,0x00,0x00,0x00,0x1A,0xC8,0x07,0x00,0xEA,0x5C,0x00,0x9F,0xE5,
+ 0x5C,0x10,0x9F,0xE5,0x5C,0x30,0x9F,0xE5,0x01,0x00,0x50,0xE1,0x03,0x00,0x00,0x0A,
+ 0x03,0x00,0x51,0xE1,0x04,0x20,0x90,0x34,0x04,0x20,0x81,0x34,0xFB,0xFF,0xFF,0x3A,
+ 0x44,0x10,0x9F,0xE5,0x00,0x20,0xA0,0xE3,0x01,0x00,0x53,0xE1,0x04,0x20,0x83,0x34,
+ 0xFC,0xFF,0xFF,0x3A,0x2B,0x00,0x00,0xEA,0x00,0x06,0x02,0x10,0xC0,0x12,0x02,0x10,
+ 0x88,0x11,0x02,0x10,0x84,0x11,0x02,0x10,0x98,0x11,0x02,0x10,0x94,0x11,0x02,0x10,
+ 0x20,0x00,0x02,0x02,0x24,0x00,0x02,0x02,0x10,0x0D,0xBA,0xFC,0x98,0x13,0x02,0x10,
+ 0xA4,0x2A,0x02,0x02,0xA4,0x2A,0x02,0x02,0xA4,0x2A,0x02,0x02,0xA4,0x2A,0x02,0x02,
+ 0x01,0x12,0xA0,0xE3,0x0C,0x00,0x91,0xE5,0x00,0x00,0x50,0xE3,0x02,0x00,0x00,0x1A,
+ 0x00,0x10,0xA0,0xE3,0x04,0x21,0x9F,0xE5,0x08,0x10,0x82,0xE5,0x1E,0xFF,0x2F,0xE1,
+ 0xFC,0x00,0x9F,0xE5,0x00,0x07,0x90,0xE5,0x02,0x07,0x80,0xE3,0x02,0x0B,0x80,0xE3,
+ 0xEC,0x10,0x9F,0xE5,0x00,0x07,0x81,0xE5,0x01,0x00,0xA0,0xE1,0x04,0x07,0x90,0xE5,
+ 0x02,0x04,0x80,0xE3,0x40,0x00,0x80,0xE3,0x04,0x07,0x81,0xE5,0x01,0x00,0xA0,0xE1,
+ 0x00,0x09,0x90,0xE5,0x02,0x04,0x80,0xE3,0x80,0x00,0x80,0xE3,0x00,0x09,0x81,0xE5,
+ 0x07,0x09,0x01,0xE3,0x19,0x17,0x81,0xE2,0x08,0x00,0x81,0xE5,0x42,0x18,0x81,0xE2,
+ 0x08,0x00,0x81,0xE5,0x1E,0xFF,0x2F,0xE1,0x70,0x40,0x2D,0xE9,0xDF,0xFF,0xFF,0xEB,
+ 0xE6,0xFF,0xFF,0xEB,0x2B,0x00,0x00,0xEB,0x70,0x40,0xFF,0xE6,0x2E,0x00,0x00,0xEB,
+ 0xFF,0x50,0x00,0xE2,0x9D,0x01,0x00,0xEB,0x00,0x60,0xA0,0xE1,0x04,0x00,0xA0,0xE1,
+ 0xDA,0x00,0x00,0xEB,0x00,0x00,0x55,0xE3,0x0A,0x00,0x00,0x1A,0x30,0x00,0x00,0xEB,
+ 0x00,0x00,0x50,0xE3,0x04,0x00,0x00,0x1A,0x68,0x00,0x9F,0xE5,0x68,0x10,0x9F,0xE5,
+ 0x80,0x09,0x81,0xE5,0x00,0xF0,0x20,0xE3,0xFE,0xFF,0xFF,0xEA,0x5C,0x00,0x9F,0xE5,
+ 0x30,0xFF,0x2F,0xE1,0x0F,0x00,0x00,0xEA,0x00,0x00,0x56,0xE3,0x02,0x00,0x00,0x0A,
+ 0x48,0x00,0x9F,0xE5,0x30,0xFF,0x2F,0xE1,0x0A,0x00,0x00,0xEA,0x5E,0x01,0x00,0xEB,
+ 0x01,0x00,0x50,0xE3,0x02,0x00,0x00,0x1A,0x30,0x00,0x9F,0xE5,0x30,0xFF,0x2F,0xE1,
+ 0x04,0x00,0x00,0xEA,0x28,0x00,0x9F,0xE5,0x1C,0x10,0x9F,0xE5,0x80,0x09,0x81,0xE5,
+ 0x00,0xF0,0x20,0xE3,0xFE,0xFF,0xFF,0xEA,0x00,0x00,0xA0,0xE3,0x70,0x80,0xBD,0xE8,
+ 0x00,0x00,0x9D,0x13,0x00,0x00,0x04,0x10,0x60,0x00,0xAD,0xDE,0x00,0x00,0x02,0x10,
+ 0x00,0x34,0x02,0x02,0x61,0x00,0xAD,0xDE,0xAC,0x00,0x9F,0xE5,0x80,0x09,0x90,0xE5,
+ 0x70,0x10,0xFF,0xE6,0x01,0x00,0xA0,0xE1,0x1E,0xFF,0x2F,0xE1,0x98,0x00,0x9F,0xE5,
+ 0x80,0x19,0x90,0xE5,0x01,0x08,0x11,0xE3,0x01,0x00,0x00,0x0A,0x01,0x00,0xA0,0xE3,
+ 0x1E,0xFF,0x2F,0xE1,0x00,0x00,0xA0,0xE3,0xFC,0xFF,0xFF,0xEA,0x00,0xF0,0x20,0xE3,
+ 0xFE,0xFF,0xFF,0xEA,0x30,0x40,0x2D,0xE9,0x00,0x30,0xA0,0xE3,0x6C,0x00,0x9F,0xE5,
+ 0xFC,0x4B,0x90,0xE5,0x00,0x20,0xA0,0xE3,0x0E,0x00,0x00,0xEA,0x60,0x00,0x9F,0xE5,
+ 0x02,0x01,0x80,0xE0,0x00,0x14,0x90,0xE5,0x00,0x00,0x51,0xE3,0x00,0x00,0x00,0x1A,
+ 0x07,0x00,0x00,0xEA,0x51,0x58,0xE7,0xE7,0x21,0x0C,0x85,0xE0,0x51,0x54,0xE7,0xE7,
+ 0x05,0x00,0x80,0xE0,0xFF,0x50,0x01,0xE2,0x05,0x00,0x80,0xE0,0x00,0x30,0x83,0xE0,
+ 0x00,0xF0,0x20,0xE3,0x01,0x20,0x82,0xE2,0xFF,0x0D,0x00,0xE3,0x00,0x00,0x52,0xE1,
+ 0xED,0xFF,0xFF,0x3A,0x03,0x00,0x54,0xE1,0x01,0x00,0x00,0x0A,0x00,0x00,0xA0,0xE3,
+ 0x30,0x80,0xBD,0xE8,0x01,0x00,0xA0,0xE3,0xFC,0xFF,0xFF,0xEA,0x00,0x00,0x02,0x10,
+ 0x00,0x60,0x02,0x02,0x00,0x30,0x02,0x02,0x10,0x40,0x2D,0xE9,0x20,0x40,0xA0,0xE3,
+ 0x60,0x04,0x9F,0xE5,0x0D,0x1B,0x80,0xE2,0x3C,0x20,0x90,0xE5,0x04,0x00,0xA0,0xE1,
+ 0x32,0xFF,0x2F,0xE1,0x01,0x00,0x50,0xE3,0x01,0x00,0x00,0x1A,0x01,0x00,0xA0,0xE3,
+ 0x10,0x80,0xBD,0xE8,0x00,0x00,0xA0,0xE3,0xFC,0xFF,0xFF,0xEA,0x10,0x40,0x2D,0xE9,
+ 0x20,0x40,0xA0,0xE3,0x2C,0x04,0x9F,0xE5,0x0D,0x1B,0x80,0xE2,0x44,0x20,0x90,0xE5,
+ 0x04,0x00,0xA0,0xE1,0x32,0xFF,0x2F,0xE1,0x01,0x00,0x50,0xE3,0x01,0x00,0x00,0x1A,
+ 0x01,0x00,0xA0,0xE3,0x10,0x80,0xBD,0xE8,0x00,0x00,0xA0,0xE3,0xFC,0xFF,0xFF,0xEA,
+ 0x10,0x40,0x2D,0xE9,0xFC,0x13,0x9F,0xE5,0x6C,0x00,0x91,0xE5,0x30,0xFF,0x2F,0xE1,
+ 0x10,0x80,0xBD,0xE8,0x70,0x40,0x2D,0xE9,0x20,0x40,0xA0,0xE3,0xF7,0xFF,0xFF,0xEB,
+ 0x01,0x10,0xA0,0xE3,0xA0,0x54,0x81,0xE0,0xD8,0x03,0x9F,0xE5,0x0D,0x2B,0x80,0xE2,
+ 0x04,0x10,0xA0,0xE1,0x30,0x30,0x90,0xE5,0x05,0x00,0xA0,0xE1,0x33,0xFF,0x2F,0xE1,
+ 0x01,0x00,0x50,0xE3,0x01,0x00,0x00,0x1A,0x01,0x00,0xA0,0xE3,0x70,0x80,0xBD,0xE8,
+ 0x00,0x00,0xA0,0xE3,0xFC,0xFF,0xFF,0xEA,0x10,0x40,0x2D,0xE9,0xE7,0xFF,0xFF,0xEB,
+ 0x00,0x40,0xA0,0xE1,0x9C,0x03,0x9F,0xE5,0x0D,0x2B,0x80,0xE2,0x01,0x19,0xA0,0xE3,
+ 0x58,0x30,0x90,0xE5,0x04,0x00,0xA0,0xE1,0x33,0xFF,0x2F,0xE1,0x00,0x00,0x50,0xE3,
+ 0x01,0x00,0x00,0x0A,0x01,0x00,0xA0,0xE3,0x10,0x80,0xBD,0xE8,0x00,0x00,0xA0,0xE3,
+ 0xFC,0xFF,0xFF,0xEA,0x10,0x40,0x2D,0xE9,0x68,0x13,0x9F,0xE5,0x70,0x00,0x91,0xE5,
+ 0x30,0xFF,0x2F,0xE1,0x10,0x80,0xBD,0xE8,0x10,0x40,0x2D,0xE9,0x54,0x03,0x9F,0xE5,
+ 0x01,0x19,0xA0,0xE3,0x60,0x20,0x90,0xE5,0x0D,0x0B,0x80,0xE2,0x32,0xFF,0x2F,0xE1,
+ 0x01,0x00,0xA0,0xE3,0x10,0x80,0xBD,0xE8,0x10,0x40,0x2D,0xE9,0xCB,0xFF,0xFF,0xEB,
+ 0x00,0x40,0xA0,0xE1,0x2C,0x03,0x9F,0xE5,0x0D,0x2B,0x80,0xE2,0x01,0x19,0xA0,0xE3,
+ 0x64,0x30,0x90,0xE5,0x04,0x00,0xA0,0xE1,0x33,0xFF,0x2F,0xE1,0x00,0x00,0x50,0xE3,
+ 0x08,0x00,0x00,0x0A,0x0C,0x13,0x9F,0xE5,0x68,0x00,0x91,0xE5,0x30,0xFF,0x2F,0xE1,
+ 0x00,0x00,0x50,0xE3,0x01,0x00,0x00,0x0A,0x01,0x00,0xA0,0xE3,0x10,0x80,0xBD,0xE8,
+ 0x00,0x00,0xA0,0xE3,0xFC,0xFF,0xFF,0xEA,0x00,0x00,0xA0,0xE3,0xFA,0xFF,0xFF,0xEA,
+ 0xF8,0x43,0x2D,0xE9,0x00,0x40,0xA0,0xE3,0x00,0x00,0xA0,0xE3,0x00,0x00,0x8D,0xE5,
+ 0x00,0x50,0xA0,0xE3,0xB1,0xFF,0xFF,0xEB,0x00,0x80,0xA0,0xE1,0x01,0x69,0xA0,0xE3,
+ 0xC0,0x02,0x9F,0xE5,0x50,0x10,0x90,0xE5,0x0D,0x00,0xA0,0xE1,0x31,0xFF,0x2F,0xE1,
+ 0x06,0x00,0xA0,0xE1,0x00,0x10,0x9D,0xE5,0x5E,0x04,0x00,0xEB,0x00,0x50,0xA0,0xE1,
+ 0x08,0x00,0xA0,0xE1,0x00,0x10,0x9D,0xE5,0x5A,0x04,0x00,0xEB,0x00,0x70,0xA0,0xE1,
+ 0x00,0xF0,0x20,0xE3,0x09,0x00,0x00,0xEA,0x07,0x20,0x84,0xE0,0x00,0x10,0x9D,0xE5,
+ 0x91,0x04,0x01,0xE0,0x02,0x04,0x81,0xE2,0x8D,0x0B,0x80,0xE2,0x74,0x12,0x9F,0xE5,
+ 0x4C,0x30,0x91,0xE5,0x00,0x10,0xA0,0xE3,0x33,0xFF,0x2F,0xE1,0x01,0x40,0x84,0xE2,
+ 0x05,0x00,0x54,0xE1,0xF3,0xFF,0xFF,0x3A,0x01,0x00,0xA0,0xE3,0xF8,0x83,0xBD,0xE8,
+ 0x10,0x40,0x2D,0xE9,0x00,0x40,0xA0,0xE1,0x12,0x00,0x54,0xE3,0x42,0x00,0x00,0x0A,
+ 0x14,0x00,0x00,0xCA,0x12,0x00,0x54,0xE3,0x04,0xF1,0x8F,0x30,0x87,0x00,0x00,0xEA,
+ 0x43,0x00,0x00,0xEA,0x38,0x00,0x00,0xEA,0x2E,0x00,0x00,0xEA,0x38,0x00,0x00,0xEA,
+ 0x41,0x00,0x00,0xEA,0x4C,0x00,0x00,0xEA,0x40,0x00,0x00,0xEA,0x2B,0x00,0x00,0xEA,
+ 0x57,0x00,0x00,0xEA,0x5D,0x00,0x00,0xEA,0x4E,0x00,0x00,0xEA,0x68,0x00,0x00,0xEA,
+ 0x7A,0x00,0x00,0xEA,0x79,0x00,0x00,0xEA,0x72,0x00,0x00,0xEA,0x77,0x00,0x00,0xEA,
+ 0x37,0x00,0x00,0xEA,0x2B,0x00,0x00,0xEA,0x1A,0x00,0x54,0xE3,0x47,0x00,0x00,0x0A,
+ 0x0A,0x00,0x00,0xCA,0x13,0x00,0x44,0xE2,0x07,0x00,0x50,0xE3,0x00,0xF1,0x8F,0x30,
+ 0x6E,0x00,0x00,0xEA,0x25,0x00,0x00,0xEA,0x2E,0x00,0x00,0xEA,0x38,0x00,0x00,0xEA,
+ 0x2D,0x00,0x00,0xEA,0x16,0x00,0x00,0xEA,0x43,0x00,0x00,0xEA,0x49,0x00,0x00,0xEA,
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+ 0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,0x59,0xFF,0xFF,0xEB,0x00,0x00,0x50,0xE3,
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+ 0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,
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+ 0x45,0x00,0x00,0xEA,0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,
+ 0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,
+ 0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,0x2F,0xFF,0xFF,0xEB,0x00,0x00,0x50,0xE3,
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+ 0x44,0xFF,0xFF,0xEB,0x00,0x00,0x50,0xE3,0x00,0x00,0x00,0x1A,0xEE,0xFE,0xFF,0xEB,
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+ 0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,0xBF,0x00,0x00,0xEB,0x00,0x00,0x50,0xE3,
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+ 0x44,0xFF,0xFF,0xEB,0x00,0x00,0x50,0xE3,0x00,0x00,0x00,0x1A,0xDA,0xFE,0xFF,0xEB,
+ 0x15,0x00,0x00,0xEA,0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,0x45,0xFF,0xFF,0xEB,
+ 0x00,0x00,0x50,0xE3,0x00,0x00,0x00,0x1A,0xD3,0xFE,0xFF,0xEB,0x0E,0x00,0x00,0xEA,
+ 0x00,0xF0,0x20,0xE3,0x32,0xFF,0xFF,0xEB,0x00,0x00,0x50,0xE3,0x00,0x00,0x00,0x1A,
+ 0xCD,0xFE,0xFF,0xEB,0x08,0x00,0x00,0xEA,0x00,0xF0,0x20,0xE3,0x0C,0xFF,0xFF,0xEB,
+ 0x00,0x00,0x50,0xE3,0x00,0x00,0x00,0x1A,0xC7,0xFE,0xFF,0xEB,0x02,0x00,0x00,0xEA,
+ 0x00,0xF0,0x20,0xE3,0xC4,0xFE,0xFF,0xEB,0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,
+ 0x01,0x00,0xA0,0xE3,0x10,0x80,0xBD,0xE8,0x00,0x00,0x02,0x02,0xF8,0x40,0x2D,0xE9,
+ 0xFA,0xFE,0xFF,0xEB,0x00,0x60,0xA0,0xE1,0x02,0x54,0x86,0xE2,0x21,0x5A,0x85,0xE2,
+ 0x01,0x3C,0xA0,0xE3,0x00,0x30,0x8D,0xE5,0x28,0x30,0x9F,0xE5,0x0E,0x2B,0xA0,0xE3,
+ 0x02,0x10,0x43,0xE0,0x05,0x00,0xA0,0xE1,0x07,0x00,0x00,0xEB,0x00,0x40,0xA0,0xE1,
+ 0x00,0x00,0x54,0xE3,0x01,0x00,0x00,0x1A,0x01,0x00,0xA0,0xE3,0xF8,0x80,0xBD,0xE8,
+ 0x00,0x00,0xA0,0xE3,0xFC,0xFF,0xFF,0xEA,0x00,0x6C,0x02,0x02,0xFC,0x47,0x2D,0xE9,
+ 0x00,0x40,0xA0,0xE1,0x01,0x50,0xA0,0xE1,0x02,0x60,0xA0,0xE1,0x03,0x70,0xA0,0xE1,
+ 0x28,0x80,0x9D,0xE5,0x33,0xAE,0x84,0xE2,0x80,0x01,0x8D,0xE8,0x06,0x30,0xA0,0xE1,
+ 0x05,0x20,0xA0,0xE1,0x43,0x1F,0xA0,0xE3,0x04,0x00,0xA0,0xE1,0x30,0xC0,0x9A,0xE5,
+ 0x3C,0xFF,0x2F,0xE1,0x00,0x90,0xA0,0xE1,0x00,0x00,0x59,0xE3,0x01,0x00,0x00,0x0A,
+ 0x09,0x00,0xA0,0xE1,0xFC,0x87,0xBD,0xE8,0x00,0x00,0xA0,0xE3,0xFC,0xFF,0xFF,0xEA,
+ 0xF0,0x40,0x2D,0xE9,0x74,0xE1,0x9F,0xE5,0x00,0xE6,0x9E,0xE5,0x02,0x11,0x0E,0xE2,
+ 0x6C,0xE1,0x9F,0xE5,0xC0,0xE2,0x9E,0xE5,0x01,0x20,0x0E,0xE2,0x60,0xE1,0x9F,0xE5,
+ 0x88,0xE1,0x9E,0xE5,0x03,0x30,0x0E,0xE2,0x54,0xE1,0x9F,0xE5,0x98,0xE1,0x9E,0xE5,
+ 0x03,0x40,0x0E,0xE2,0x48,0xE1,0x9F,0xE5,0x84,0xE1,0x9E,0xE5,0x01,0x50,0x0E,0xE2,
+ 0x3C,0xE1,0x9F,0xE5,0x94,0xE1,0x9E,0xE5,0x01,0x60,0x0E,0xE2,0x30,0xE1,0x9F,0xE5,
+ 0xE0,0xE1,0x9E,0xE5,0x03,0x70,0x0E,0xE2,0x28,0xE1,0x9F,0xE5,0x08,0xEF,0x9E,0xE5,
+ 0x10,0xC0,0x0E,0xE2,0x00,0x00,0x51,0xE3,0x42,0x00,0x00,0x0A,0x00,0x00,0x52,0xE3,
+ 0x01,0x00,0x00,0x1A,0x04,0x00,0xA0,0xE3,0x3F,0x00,0x00,0xEA,0x03,0x00,0x53,0xE3,
+ 0x13,0x00,0x00,0x1A,0x03,0x00,0x54,0xE3,0x11,0x00,0x00,0x1A,0x03,0x00,0x54,0xE3,
+ 0x07,0x00,0x00,0x1A,0x00,0x00,0x57,0xE3,0x03,0x00,0x00,0x1A,0x00,0x00,0x5C,0xE3,
+ 0x01,0x00,0x00,0x1A,0x02,0x00,0xA0,0xE3,0x33,0x00,0x00,0xEA,0x01,0x00,0xA0,0xE3,
+ 0x31,0x00,0x00,0xEA,0x00,0x00,0x57,0xE3,0x03,0x00,0x00,0x1A,0x10,0x00,0x5C,0xE3,
+ 0x01,0x00,0x00,0x1A,0x01,0x00,0xA0,0xE3,0x2B,0x00,0x00,0xEA,0x02,0x00,0xA0,0xE3,
+ 0x29,0x00,0x00,0xEA,0x00,0x00,0x55,0xE3,0x13,0x00,0x00,0x1A,0x00,0x00,0x56,0xE3,
+ 0x11,0x00,0x00,0x1A,0x03,0x00,0x54,0xE3,0x07,0x00,0x00,0x1A,0x00,0x00,0x57,0xE3,
+ 0x03,0x00,0x00,0x1A,0x00,0x00,0x5C,0xE3,0x01,0x00,0x00,0x1A,0x02,0x00,0xA0,0xE3,
+ 0x1D,0x00,0x00,0xEA,0x01,0x00,0xA0,0xE3,0x1B,0x00,0x00,0xEA,0x00,0x00,0x57,0xE3,
+ 0x03,0x00,0x00,0x1A,0x10,0x00,0x5C,0xE3,0x01,0x00,0x00,0x1A,0x01,0x00,0xA0,0xE3,
+ 0x15,0x00,0x00,0xEA,0x02,0x00,0xA0,0xE3,0x13,0x00,0x00,0xEA,0x03,0x00,0x54,0xE3,
+ 0x07,0x00,0x00,0x1A,0x00,0x00,0x57,0xE3,0x03,0x00,0x00,0x1A,0x00,0x00,0x5C,0xE3,
+ 0x01,0x00,0x00,0x1A,0x04,0x00,0xA0,0xE3,0x0B,0x00,0x00,0xEA,0x03,0x00,0xA0,0xE3,
+ 0x09,0x00,0x00,0xEA,0x00,0x00,0x57,0xE3,0x04,0x00,0x00,0x1A,0x10,0x00,0x5C,0xE3,
+ 0x02,0x00,0x00,0x1A,0x00,0xF0,0x20,0xE3,0x00,0xF0,0x20,0xE3,0xFE,0xFF,0xFF,0xEA,
+ 0x04,0x00,0xA0,0xE3,0x00,0x00,0x00,0xEA,0x00,0x00,0xA0,0xE3,0xF0,0x80,0xBD,0xE8,
+ 0x00,0x00,0x02,0x10,0x00,0x10,0x02,0x10,0x00,0x20,0x02,0x10,0x70,0x40,0x2D,0xE9,
+ 0x08,0x50,0xA0,0xE3,0x00,0x40,0xA0,0xE3,0x07,0x00,0x00,0xEA,0xFF,0x10,0x04,0xE2,
+ 0x05,0x00,0xA0,0xE1,0xA4,0x02,0x00,0xEB,0x01,0x00,0x50,0xE3,0x01,0x00,0x00,0x1A,
+ 0x01,0x00,0xA0,0xE3,0x70,0x80,0xBD,0xE8,0x01,0x40,0x84,0xE2,0x04,0x00,0x54,0xE3,
+ 0xF5,0xFF,0xFF,0xBA,0x00,0x00,0xA0,0xE3,0xF9,0xFF,0xFF,0xEA,0x70,0x40,0x2D,0xE9,
+ 0x10,0x50,0xA0,0xE3,0x00,0x40,0xA0,0xE3,0x07,0x00,0x00,0xEA,0xFF,0x10,0x04,0xE2,
+ 0x05,0x00,0xA0,0xE1,0x94,0x02,0x00,0xEB,0x01,0x00,0x50,0xE3,0x01,0x00,0x00,0x1A,
+ 0x01,0x00,0xA0,0xE3,0x70,0x80,0xBD,0xE8,0x01,0x40,0x84,0xE2,0x04,0x00,0x54,0xE3,
+ 0xF5,0xFF,0xFF,0xBA,0x00,0x00,0xA0,0xE3,0xF9,0xFF,0xFF,0xEA,0xFE,0x4F,0x2D,0xE9,
+ 0x00,0x20,0xA0,0xE1,0x84,0x0A,0x9F,0xE5,0xC0,0x40,0x90,0xE5,0xC4,0x50,0x90,0xE5,
+ 0xC8,0x60,0x90,0xE5,0xCC,0x70,0x90,0xE5,0xD0,0xC0,0x90,0xE5,0xD4,0xE0,0x90,0xE5,
+ 0xD8,0x80,0x90,0xE5,0xDC,0x90,0x90,0xE5,0xF0,0xA0,0x90,0xE5,0xF4,0x00,0x90,0xE5,
+ 0x08,0x00,0x8D,0xE5,0x54,0x0A,0x9F,0xE5,0xF8,0x00,0x90,0xE5,0x04,0x00,0x8D,0xE5,
+ 0x48,0x0A,0x9F,0xE5,0xFC,0x00,0x90,0xE5,0x00,0x00,0x8D,0xE5,0x00,0x30,0xA0,0xE3,
+ 0x04,0x00,0x00,0xEA,0x03,0x02,0xA0,0xE1,0x34,0x00,0xA0,0xE1,0x1F,0x06,0xDF,0xE7,
+ 0x04,0x00,0x82,0xE4,0x01,0x30,0x83,0xE2,0x02,0x00,0x53,0xE3,0xF8,0xFF,0xFF,0x3A,
+ 0x00,0x30,0xA0,0xE3,0x04,0x00,0x00,0xEA,0x03,0x02,0xA0,0xE1,0x35,0x00,0xA0,0xE1,
+ 0x1F,0x06,0xDF,0xE7,0x04,0x00,0x82,0xE4,0x01,0x30,0x83,0xE2,0x02,0x00,0x53,0xE3,
+ 0xF8,0xFF,0xFF,0x3A,0x00,0x30,0xA0,0xE3,0x04,0x00,0x00,0xEA,0x03,0x02,0xA0,0xE1,
+ 0x36,0x00,0xA0,0xE1,0x1F,0x06,0xDF,0xE7,0x04,0x00,0x82,0xE4,0x01,0x30,0x83,0xE2,
+ 0x02,0x00,0x53,0xE3,0xF8,0xFF,0xFF,0x3A,0x00,0x30,0xA0,0xE3,0x04,0x00,0x00,0xEA,
+ 0x03,0x02,0xA0,0xE1,0x37,0x00,0xA0,0xE1,0x1F,0x06,0xDF,0xE7,0x04,0x00,0x82,0xE4,
+ 0x01,0x30,0x83,0xE2,0x02,0x00,0x53,0xE3,0xF8,0xFF,0xFF,0x3A,0x00,0x30,0xA0,0xE3,
+ 0x04,0x00,0x00,0xEA,0x03,0x02,0xA0,0xE1,0x3C,0x00,0xA0,0xE1,0x1F,0x06,0xDF,0xE7,
+ 0x04,0x00,0x82,0xE4,0x01,0x30,0x83,0xE2,0x02,0x00,0x53,0xE3,0xF8,0xFF,0xFF,0x3A,
+ 0x00,0x30,0xA0,0xE3,0x04,0x00,0x00,0xEA,0x03,0x02,0xA0,0xE1,0x3E,0x00,0xA0,0xE1,
+ 0x1F,0x06,0xDF,0xE7,0x04,0x00,0x82,0xE4,0x01,0x30,0x83,0xE2,0x02,0x00,0x53,0xE3,
+ 0xF8,0xFF,0xFF,0x3A,0x00,0x30,0xA0,0xE3,0x04,0x00,0x00,0xEA,0x03,0x02,0xA0,0xE1,
+ 0x38,0x00,0xA0,0xE1,0x1F,0x06,0xDF,0xE7,0x04,0x00,0x82,0xE4,0x01,0x30,0x83,0xE2,
+ 0x02,0x00,0x53,0xE3,0xF8,0xFF,0xFF,0x3A,0x00,0x30,0xA0,0xE3,0x04,0x00,0x00,0xEA,
+ 0x03,0x02,0xA0,0xE1,0x39,0x00,0xA0,0xE1,0x1F,0x06,0xDF,0xE7,0x04,0x00,0x82,0xE4,
+ 0x01,0x30,0x83,0xE2,0x02,0x00,0x53,0xE3,0xF8,0xFF,0xFF,0x3A,0x00,0x30,0xA0,0xE3,
+ 0x04,0x00,0x00,0xEA,0x83,0x01,0xA0,0xE1,0x3A,0x00,0xA0,0xE1,0xFF,0x00,0x00,0xE2,
+ 0x04,0x00,0x81,0xE4,0x01,0x30,0x83,0xE2,0x04,0x00,0x53,0xE3,0xF8,0xFF,0xFF,0x3A,
+ 0x00,0x30,0xA0,0xE3,0x05,0x00,0x00,0xEA,0x83,0x01,0xA0,0xE1,0x08,0xB0,0x9D,0xE5,
+ 0x3B,0x00,0xA0,0xE1,0xFF,0x00,0x00,0xE2,0x04,0x00,0x81,0xE4,0x01,0x30,0x83,0xE2,
+ 0x04,0x00,0x53,0xE3,0xF7,0xFF,0xFF,0x3A,0x00,0x30,0xA0,0xE3,0x05,0x00,0x00,0xEA,
+ 0x83,0x01,0xA0,0xE1,0x04,0xB0,0x9D,0xE5,0x3B,0x00,0xA0,0xE1,0xFF,0x00,0x00,0xE2,
+ 0x04,0x00,0x81,0xE4,0x01,0x30,0x83,0xE2,0x04,0x00,0x53,0xE3,0xF7,0xFF,0xFF,0x3A,
+ 0x00,0x30,0xA0,0xE3,0x05,0x00,0x00,0xEA,0x83,0x01,0xA0,0xE1,0x00,0xB0,0x9D,0xE5,
+ 0x3B,0x00,0xA0,0xE1,0xFF,0x00,0x00,0xE2,0x04,0x00,0x81,0xE4,0x01,0x30,0x83,0xE2,
+ 0x04,0x00,0x53,0xE3,0xF7,0xFF,0xFF,0x3A,0x01,0x00,0xA0,0xE3,0xFE,0x8F,0xBD,0xE8,
+ 0xF0,0x43,0x2D,0xE9,0x06,0xDD,0x4D,0xE2,0x00,0x40,0xA0,0xE1,0x01,0x50,0xA0,0xE1,
+ 0x68,0x08,0x9F,0xE5,0x40,0x00,0x90,0xE5,0xFF,0x70,0x00,0xE2,0x00,0x00,0x57,0xE3,
+ 0x02,0x00,0x00,0x1A,0x01,0x00,0xA0,0xE3,0x06,0xDD,0x8D,0xE2,0xF0,0x83,0xBD,0xE8,
+ 0x05,0x00,0x57,0xE1,0x01,0x00,0x00,0x9A,0x00,0x00,0xA0,0xE3,0xF9,0xFF,0xFF,0xEA,
+ 0x08,0x00,0x55,0xE3,0x02,0x00,0x00,0x0A,0x10,0x00,0x55,0xE3,0x08,0x00,0x00,0x1A,
+ 0x03,0x00,0x00,0xEA,0x00,0xF0,0x20,0xE3,0x02,0x8C,0xA0,0xE3,0x0D,0x90,0xA0,0xE3,
+ 0x06,0x00,0x00,0xEA,0x00,0xF0,0x20,0xE3,0x02,0x8C,0xA0,0xE3,0x1A,0x90,0xA0,0xE3,
+ 0x02,0x00,0x00,0xEA,0x00,0xF0,0x20,0xE3,0x00,0x00,0xA0,0xE3,0xE9,0xFF,0xFF,0xEA,
+ 0x00,0xF0,0x20,0xE3,0x0D,0x10,0xA0,0xE1,0xC0,0x00,0x8D,0xE2,0x56,0xFF,0xFF,0xEB,
+ 0x00,0x00,0x50,0xE3,0x01,0x00,0x00,0x1A,0x00,0x00,0xA0,0xE3,0xE1,0xFF,0xFF,0xEA,
+ 0x00,0x60,0xA0,0xE3,0x10,0x00,0x00,0xEA,0xC0,0x00,0x8D,0xE2,0x06,0x01,0x90,0xE7,
+ 0x09,0x10,0x88,0xE0,0x01,0x00,0x50,0xE1,0x08,0x00,0x00,0x2A,0xC0,0x00,0x8D,0xE2,
+ 0x06,0x01,0x90,0xE7,0x00,0x00,0xD4,0xE7,0x06,0x11,0x9D,0xE7,0x01,0x00,0x20,0xE0,
+ 0xC0,0x10,0x8D,0xE2,0x06,0x11,0x91,0xE7,0x01,0x00,0xC4,0xE7,0x01,0x00,0x00,0xEA,
+ 0x00,0x00,0xA0,0xE3,0xCF,0xFF,0xFF,0xEA,0x01,0x60,0x86,0xE2,0x07,0x00,0x56,0xE1,
+ 0xEC,0xFF,0xFF,0x3A,0x01,0x00,0xA0,0xE3,0xCA,0xFF,0xFF,0xEA,0x7C,0x17,0x9F,0xE5,
+ 0x20,0x00,0x91,0xE5,0x01,0x05,0xC0,0xE3,0x20,0x00,0x81,0xE5,0x1E,0xFF,0x2F,0xE1,
+ 0x68,0x17,0x9F,0xE5,0x20,0x00,0x91,0xE5,0x01,0x05,0x80,0xE3,0x20,0x00,0x81,0xE5,
+ 0x1E,0xFF,0x2F,0xE1,0x54,0x17,0x9F,0xE5,0x20,0x00,0x91,0xE5,0x02,0x05,0x80,0xE3,
+ 0x20,0x00,0x81,0xE5,0x1E,0xFF,0x2F,0xE1,0x00,0x20,0xA0,0xE1,0x9F,0x27,0xDF,0xE7,
+ 0x02,0x10,0xA0,0xE1,0x34,0x27,0x9F,0xE5,0x50,0x10,0x82,0xE5,0x1E,0xFF,0x2F,0xE1,
+ 0x10,0x40,0x2D,0xE9,0x70,0x00,0xA0,0xE3,0xCE,0x46,0xA0,0xE3,0x08,0x00,0x84,0xE5,
+ 0x00,0x30,0xA0,0xE3,0x00,0x00,0x00,0xEA,0x01,0x30,0x83,0xE2,0x20,0x0E,0x04,0xE3,
+ 0x00,0x00,0x53,0xE1,0xFB,0xFF,0xFF,0x3A,0x70,0x00,0xA0,0xE3,0xCE,0x46,0xA0,0xE3,
+ 0x08,0x00,0x84,0xE5,0x00,0x10,0xA0,0xE3,0x09,0x00,0x00,0xEA,0xCE,0x06,0xA0,0xE3,
+ 0x10,0x20,0xD0,0xE5,0x40,0x00,0x12,0xE3,0x04,0x00,0x00,0x0A,0x00,0x00,0xA0,0xE3,
+ 0xCE,0x46,0xA0,0xE3,0x08,0x00,0x84,0xE5,0x01,0x00,0xA0,0xE3,0x10,0x80,0xBD,0xE8,
+ 0x01,0x10,0x81,0xE2,0xC8,0x06,0x9F,0xE5,0x00,0x00,0x51,0xE1,0xF2,0xFF,0xFF,0x3A,
+ 0x00,0x00,0xA0,0xE3,0xF8,0xFF,0xFF,0xEA,0x00,0x10,0xA0,0xE3,0x06,0x00,0x00,0xEA,
+ 0xCE,0x06,0xA0,0xE3,0x28,0x00,0x90,0xE5,0x10,0x00,0x10,0xE3,0x01,0x00,0x00,0x0A,
+ 0x01,0x00,0xA0,0xE3,0x1E,0xFF,0x2F,0xE1,0x01,0x10,0x81,0xE2,0x90,0x06,0x9F,0xE5,
+ 0x00,0x00,0x51,0xE1,0xF5,0xFF,0xFF,0x3A,0x00,0x00,0xA0,0xE3,0xF8,0xFF,0xFF,0xEA,
+ 0xFE,0x4F,0x2D,0xE9,0x00,0x40,0xA0,0xE1,0x01,0x50,0xA0,0xE1,0x02,0x60,0xA0,0xE1,
+ 0x03,0x70,0xA0,0xE1,0x00,0x00,0xA0,0xE3,0x04,0x00,0x8D,0xE5,0xA9,0x89,0x05,0xE3,
+ 0x08,0x00,0x56,0xE3,0x02,0x00,0x00,0x0A,0x10,0x00,0x56,0xE3,0x0E,0x00,0x00,0x1A,
+ 0x06,0x00,0x00,0xEA,0x00,0xF0,0x20,0xE3,0x01,0x90,0xA0,0xE3,0x03,0xA0,0xA0,0xE3,
+ 0x02,0x0C,0xA0,0xE3,0x00,0x00,0x8D,0xE5,0x0D,0xB0,0xA0,0xE3,0x09,0x00,0x00,0xEA,
+ 0x00,0xF0,0x20,0xE3,0x02,0x90,0xA0,0xE3,0x03,0xA0,0xA0,0xE3,0x02,0x0C,0xA0,0xE3,
+ 0x00,0x00,0x8D,0xE5,0x1A,0xB0,0xA0,0xE3,0x02,0x00,0x00,0xEA,0x00,0xF0,0x20,0xE3,
+ 0x00,0x00,0xA0,0xE3,0xFE,0x8F,0xBD,0xE8,0x00,0xF0,0x20,0xE3,0x20,0x00,0xA0,0xE3,
+ 0xCE,0x16,0xA0,0xE3,0x28,0x00,0x81,0xE5,0xCE,0x06,0xA0,0xE3,0x04,0x00,0x90,0xE5,
+ 0x80,0x00,0x80,0xE3,0x04,0x00,0x81,0xE5,0xCE,0x06,0xA0,0xE3,0x04,0x10,0x90,0xE5,
+ 0x01,0x00,0x57,0xE3,0x01,0x00,0x00,0xDA,0x14,0x00,0x87,0xE2,0x00,0x00,0x00,0xEA,
+ 0x01,0x00,0x87,0xE2,0x01,0x20,0xA0,0xE3,0x12,0x00,0xC1,0xE1,0xCE,0x16,0xA0,0xE3,
+ 0x04,0x00,0x81,0xE5,0x10,0x00,0xA0,0xE3,0x28,0x00,0x81,0xE5,0x01,0x04,0xA0,0xE3,
+ 0xC0,0x13,0x81,0xE1,0x30,0x00,0x81,0xE5,0xCE,0x06,0xA0,0xE3,0x04,0x00,0x90,0xE5,
+ 0x80,0x00,0x80,0xE3,0xCE,0x16,0xA0,0xE3,0x04,0x00,0x81,0xE5,0x10,0x00,0xA0,0xE3,
+ 0x28,0x00,0x81,0xE5,0x00,0x00,0xA0,0xE3,0x08,0x00,0x81,0xE5,0x08,0x00,0x8D,0xE5,
+ 0x05,0x00,0x00,0xEA,0x00,0x00,0xA0,0xE3,0xCE,0x16,0xA0,0xE3,0x0C,0x00,0x81,0xE5,
+ 0x08,0x00,0x9D,0xE5,0x01,0x00,0x80,0xE2,0x08,0x00,0x8D,0xE5,0x08,0x00,0x9D,0xE5,
+ 0x09,0x00,0x50,0xE1,0xF6,0xFF,0xFF,0x3A,0x00,0x00,0xA0,0xE3,0x08,0x00,0x8D,0xE5,
+ 0x08,0x00,0x00,0xEA,0x08,0x00,0x9D,0xE5,0x80,0x01,0xA0,0xE1,0x35,0x00,0xA0,0xE1,
+ 0xFF,0x00,0x00,0xE2,0xCE,0x16,0xA0,0xE3,0x0C,0x00,0x81,0xE5,0x08,0x00,0x9D,0xE5,
+ 0x01,0x00,0x80,0xE2,0x08,0x00,0x8D,0xE5,0x08,0x00,0x9D,0xE5,0x0A,0x00,0x50,0xE1,
+ 0xF3,0xFF,0xFF,0x3A,0x08,0x00,0x56,0xE3,0x02,0x00,0x00,0x0A,0x30,0x00,0xA0,0xE3,
+ 0xCE,0x16,0xA0,0xE3,0x08,0x00,0x81,0xE5,0x00,0x00,0x57,0xE3,0x0F,0x00,0x00,0x1A,
+ 0x90,0xFF,0xFF,0xEB,0x00,0x00,0x50,0xE3,0x1C,0x00,0x00,0x1A,0xCE,0x06,0xA0,0xE3,
+ 0x04,0x10,0x90,0xE5,0x01,0x00,0x57,0xE3,0x01,0x00,0x00,0xDA,0x14,0x00,0x87,0xE2,
+ 0x00,0x00,0x00,0xEA,0x01,0x00,0x87,0xE2,0x01,0x20,0xA0,0xE3,0x12,0x00,0x81,0xE1,
+ 0xCE,0x16,0xA0,0xE3,0x04,0x00,0x81,0xE5,0x00,0x00,0xA0,0xE3,0xAC,0xFF,0xFF,0xEA,
+ 0x62,0xFF,0xFF,0xEB,0x00,0x00,0x50,0xE3,0x0C,0x00,0x00,0x1A,0xCE,0x06,0xA0,0xE3,
+ 0x04,0x10,0x90,0xE5,0x01,0x00,0x57,0xE3,0x01,0x00,0x00,0xDA,0x14,0x00,0x87,0xE2,
+ 0x00,0x00,0x00,0xEA,0x01,0x00,0x87,0xE2,0x01,0x20,0xA0,0xE3,0x12,0x00,0x81,0xE1,
+ 0xCE,0x16,0xA0,0xE3,0x04,0x00,0x81,0xE5,0x00,0x00,0xA0,0xE3,0x9C,0xFF,0xFF,0xEA,
+ 0x10,0x00,0xA0,0xE3,0xCE,0x16,0xA0,0xE3,0x28,0x00,0x81,0xE5,0xCE,0x06,0xA0,0xE3,
+ 0x04,0x00,0x90,0xE5,0x80,0x00,0xC0,0xE3,0x04,0x00,0x81,0xE5,0xCE,0x06,0xA0,0xE3,
+ 0x04,0x00,0x90,0xE5,0x30,0x00,0x80,0xE3,0x04,0x00,0x81,0xE5,0x02,0x08,0x81,0xE2,
+ 0x20,0x00,0x90,0xE5,0x04,0x00,0x80,0xE3,0x02,0x18,0x81,0xE2,0x20,0x00,0x81,0xE5,
+ 0x08,0x00,0x56,0xE3,0x03,0x00,0x00,0x0A,0x08,0x00,0xA0,0xE1,0x39,0xFF,0xFF,0xEB,
+ 0x33,0xFF,0xFF,0xEB,0x2D,0xFF,0xFF,0xEB,0x00,0x00,0xA0,0xE3,0x08,0x00,0x8D,0xE5,
+ 0x05,0x00,0x00,0xEA,0xCE,0x06,0xA0,0xE3,0x10,0x00,0xD0,0xE5,0x01,0x00,0xC4,0xE4,
+ 0x08,0x00,0x9D,0xE5,0x01,0x00,0x80,0xE2,0x08,0x00,0x8D,0xE5,0x08,0x00,0x9D,0xE5,
+ 0x00,0x10,0x9D,0xE5,0x01,0x00,0x50,0xE1,0xF5,0xFF,0xFF,0x3A,0x00,0x00,0xA0,0xE3,
+ 0x08,0x00,0x8D,0xE5,0x04,0x00,0x00,0xEA,0xCE,0x06,0xA0,0xE3,0x10,0x00,0xD0,0xE5,
+ 0x08,0x00,0x9D,0xE5,0x01,0x00,0x80,0xE2,0x08,0x00,0x8D,0xE5,0x08,0x00,0x9D,0xE5,
+ 0x0B,0x00,0x50,0xE1,0xF7,0xFF,0xFF,0x3A,0x08,0x00,0x56,0xE3,0x00,0x00,0x00,0x0A,
+ 0x0D,0xFF,0xFF,0xEB,0xCE,0x06,0xA0,0xE3,0x04,0x00,0x90,0xE5,0x80,0x00,0x80,0xE3,
+ 0xCE,0x16,0xA0,0xE3,0x04,0x00,0x81,0xE5,0x00,0xF0,0x20,0xE3,0x9C,0x03,0x9F,0xE5,
+ 0x30,0x00,0x90,0xE5,0x01,0x04,0x10,0xE3,0xFB,0xFF,0xFF,0x0A,0x01,0x04,0xA0,0xE3,
+ 0x88,0x13,0x9F,0xE5,0x30,0x00,0x81,0xE5,0x00,0xF0,0x20,0xE3,0x7C,0x03,0x9F,0xE5,
+ 0x30,0x00,0x90,0xE5,0x02,0x01,0x10,0xE3,0xFB,0xFF,0xFF,0x1A,0x00,0x10,0x9D,0xE5,
+ 0x01,0x00,0x44,0xE0,0x06,0x10,0xA0,0xE1,0xB8,0xFE,0xFF,0xEB,0x00,0x00,0x50,0xE3,
+ 0x0C,0x00,0x00,0x1A,0xCE,0x06,0xA0,0xE3,0x04,0x10,0x90,0xE5,0x01,0x00,0x57,0xE3,
+ 0x01,0x00,0x00,0xDA,0x14,0x00,0x87,0xE2,0x00,0x00,0x00,0xEA,0x01,0x00,0x87,0xE2,
+ 0x01,0x20,0xA0,0xE3,0x12,0x00,0x81,0xE1,0xCE,0x16,0xA0,0xE3,0x04,0x00,0x81,0xE5,
+ 0x00,0x00,0xA0,0xE3,0x46,0xFF,0xFF,0xEA,0xCE,0x06,0xA0,0xE3,0x28,0x00,0x90,0xE5,
+ 0x20,0x00,0x10,0xE3,0x0F,0x00,0x00,0x0A,0x20,0x00,0xA0,0xE3,0xCE,0x16,0xA0,0xE3,
+ 0x28,0x00,0x81,0xE5,0xCE,0x06,0xA0,0xE3,0x04,0x10,0x90,0xE5,0x01,0x00,0x57,0xE3,
+ 0x01,0x00,0x00,0xDA,0x14,0x00,0x87,0xE2,0x00,0x00,0x00,0xEA,0x01,0x00,0x87,0xE2,
+ 0x01,0x20,0xA0,0xE3,0x12,0x00,0x81,0xE1,0xCE,0x16,0xA0,0xE3,0x04,0x00,0x81,0xE5,
+ 0x00,0x00,0xA0,0xE3,0x32,0xFF,0xFF,0xEA,0xCE,0x06,0xA0,0xE3,0x04,0x10,0x90,0xE5,
+ 0x01,0x00,0x57,0xE3,0x01,0x00,0x00,0xDA,0x14,0x00,0x87,0xE2,0x00,0x00,0x00,0xEA,
+ 0x01,0x00,0x87,0xE2,0x01,0x20,0xA0,0xE3,0x12,0x00,0x81,0xE1,0xCE,0x16,0xA0,0xE3,
+ 0x04,0x00,0x81,0xE5,0x01,0x00,0xA0,0xE3,0x25,0xFF,0xFF,0xEA,0xF8,0x4F,0x2D,0xE9,
+ 0x00,0x40,0xA0,0xE1,0x01,0x50,0xA0,0xE1,0x02,0x60,0xA0,0xE1,0x03,0x70,0xA0,0xE1,
+ 0x04,0x80,0xA0,0xE1,0x84,0x02,0x9F,0xE5,0x20,0x00,0x90,0xE5,0x01,0x08,0xC0,0xE3,
+ 0x78,0x12,0x9F,0xE5,0x20,0x00,0x81,0xE5,0x08,0x00,0x57,0xE3,0x05,0x00,0x00,0x1A,
+ 0x01,0x00,0xA0,0xE1,0x00,0x00,0x90,0xE5,0x0F,0x00,0xC0,0xE3,0x03,0x00,0x80,0xE3,
+ 0x00,0x00,0x81,0xE5,0x02,0xAC,0xA0,0xE3,0x10,0x00,0x57,0xE3,0x06,0x00,0x00,0x1A,
+ 0x48,0x02,0x9F,0xE5,0x00,0x00,0x90,0xE5,0x0F,0x00,0xC0,0xE3,0x05,0x00,0x80,0xE3,
+ 0x38,0x12,0x9F,0xE5,0x00,0x00,0x81,0xE5,0x02,0xAC,0xA0,0xE3,0x2C,0x02,0x9F,0xE5,
+ 0x00,0x00,0x90,0xE5,0x1F,0x08,0xDA,0xE7,0x01,0x10,0x4A,0xE2,0x01,0x08,0x80,0xE1,
+ 0x18,0x12,0x9F,0xE5,0x00,0x00,0x81,0xE5,0x0A,0x10,0xA0,0xE1,0x05,0x00,0xA0,0xE1,
+ 0xE4,0x00,0x00,0xEB,0x00,0xB0,0xA0,0xE1,0x0A,0x10,0x86,0xE0,0x01,0x00,0x41,0xE2,
+ 0x0A,0x10,0xA0,0xE1,0xDF,0x00,0x00,0xEB,0x00,0x00,0x8D,0xE5,0x0B,0x90,0xA0,0xE1,
+ 0x0A,0x00,0x00,0xEA,0x07,0x20,0xA0,0xE1,0x09,0x10,0xA0,0xE1,0x08,0x00,0xA0,0xE1,
+ 0x28,0x30,0x9D,0xE5,0xD5,0xFE,0xFF,0xEB,0x00,0x00,0x50,0xE3,0x01,0x00,0x00,0x1A,
+ 0x00,0x00,0xA0,0xE3,0xF8,0x8F,0xBD,0xE8,0x0A,0x80,0x88,0xE0,0x01,0x90,0x89,0xE2,
+ 0x00,0x00,0x9D,0xE5,0x0B,0x00,0x80,0xE0,0x09,0x00,0x50,0xE1,0xF0,0xFF,0xFF,0x8A,
+ 0x01,0x00,0xA0,0xE3,0xF6,0xFF,0xFF,0xEA,0x10,0x40,0x2D,0xE9,0x00,0x40,0xA0,0xE1,
+ 0xCE,0x06,0xA0,0xE3,0x04,0x10,0x90,0xE5,0x01,0x00,0x54,0xE3,0x01,0x00,0x00,0xDA,
+ 0x14,0x00,0x84,0xE2,0x00,0x00,0x00,0xEA,0x01,0x00,0x84,0xE2,0x01,0x20,0xA0,0xE3,
+ 0x12,0x00,0xC1,0xE1,0xCE,0x16,0xA0,0xE3,0x04,0x00,0x81,0xE5,0x10,0x00,0xA0,0xE3,
+ 0x28,0x00,0x81,0xE5,0x00,0x00,0xA0,0xE3,0x08,0x00,0x81,0xE5,0xFF,0x00,0xA0,0xE3,
+ 0x08,0x00,0x81,0xE5,0x00,0x00,0x54,0xE3,0x0F,0x00,0x00,0x1A,0xA5,0xFE,0xFF,0xEB,
+ 0x00,0x00,0x50,0xE3,0x1C,0x00,0x00,0x1A,0xCE,0x06,0xA0,0xE3,0x04,0x10,0x90,0xE5,
+ 0x01,0x00,0x54,0xE3,0x01,0x00,0x00,0xDA,0x14,0x00,0x84,0xE2,0x00,0x00,0x00,0xEA,
+ 0x01,0x00,0x84,0xE2,0x01,0x20,0xA0,0xE3,0x12,0x00,0x81,0xE1,0xCE,0x16,0xA0,0xE3,
+ 0x04,0x00,0x81,0xE5,0x00,0x00,0xA0,0xE3,0x10,0x80,0xBD,0xE8,0x77,0xFE,0xFF,0xEB,
+ 0x00,0x00,0x50,0xE3,0x0C,0x00,0x00,0x1A,0xCE,0x06,0xA0,0xE3,0x04,0x10,0x90,0xE5,
+ 0x01,0x00,0x54,0xE3,0x01,0x00,0x00,0xDA,0x14,0x00,0x84,0xE2,0x00,0x00,0x00,0xEA,
+ 0x01,0x00,0x84,0xE2,0x01,0x20,0xA0,0xE3,0x12,0x00,0x81,0xE1,0xCE,0x16,0xA0,0xE3,
+ 0x04,0x00,0x81,0xE5,0x00,0x00,0xA0,0xE3,0xEE,0xFF,0xFF,0xEA,0xCE,0x06,0xA0,0xE3,
+ 0x04,0x10,0x90,0xE5,0x01,0x00,0x54,0xE3,0x01,0x00,0x00,0xDA,0x14,0x00,0x84,0xE2,
+ 0x00,0x00,0x00,0xEA,0x01,0x00,0x84,0xE2,0x01,0x20,0xA0,0xE3,0x12,0x00,0x81,0xE1,
+ 0xCE,0x16,0xA0,0xE3,0x04,0x00,0x81,0xE5,0x01,0x00,0xA0,0xE3,0xE1,0xFF,0xFF,0xEA,
+ 0x10,0x40,0x2D,0xE9,0x00,0x40,0xA0,0xE1,0x72,0x07,0x07,0xE3,0xCE,0x16,0xA0,0xE3,
+ 0x00,0x00,0x81,0xE5,0x07,0x00,0xA0,0xE3,0x04,0x00,0x81,0xE5,0x04,0x00,0xA0,0xE1,
+ 0xB4,0xFF,0xFF,0xEB,0x00,0x00,0x50,0xE3,0x01,0x00,0x00,0x1A,0x00,0x00,0xA0,0xE3,
+ 0x10,0x80,0xBD,0xE8,0x01,0x00,0xA0,0xE3,0xFC,0xFF,0xFF,0xEA,0xF8,0x43,0x2D,0xE9,
+ 0x00,0x40,0xA0,0xE1,0x01,0x50,0xA0,0xE1,0x58,0x60,0x9F,0xE5,0xBF,0xFB,0xFF,0xEB,
+ 0x00,0x80,0xA0,0xE1,0x01,0x79,0xA0,0xE3,0x05,0x00,0xA0,0xE1,0xE7,0xFF,0xFF,0xEB,
+ 0x00,0x00,0x50,0xE3,0x01,0x00,0x00,0x1A,0x00,0x00,0xA0,0xE3,0xF8,0x83,0xBD,0xE8,
+ 0x04,0x30,0xA0,0xE1,0x07,0x20,0xA0,0xE1,0x08,0x10,0xA0,0xE1,0x06,0x00,0xA0,0xE1,
+ 0x00,0x50,0x8D,0xE5,0x5C,0xFF,0xFF,0xEB,0x00,0x00,0x50,0xE3,0x01,0x00,0x00,0x1A,
+ 0x00,0x00,0xA0,0xE3,0xF4,0xFF,0xFF,0xEA,0x01,0x00,0xA0,0xE3,0xF2,0xFF,0xFF,0xEA,
+ 0x00,0x00,0xE2,0x0C,0x00,0x5A,0x62,0x02,0x00,0x34,0x02,0x02,0x01,0x30,0x90,0xE1,
+ 0x21,0x00,0x00,0x4A,0x00,0x20,0xB0,0xE3,0xA0,0x30,0x71,0xE0,0x1A,0x00,0x00,0x3A,
+ 0x20,0x32,0x71,0xE0,0x0F,0x00,0x00,0x3A,0x20,0x34,0x71,0xE0,0x01,0x00,0x00,0x3A,
+ 0x00,0xC0,0xA0,0xE3,0x20,0x00,0x00,0xEA,0xA0,0x33,0x71,0xE0,0x81,0x03,0x40,0x20,
+ 0x02,0x20,0xB2,0xE0,0x20,0x33,0x71,0xE0,0x01,0x03,0x40,0x20,0x02,0x20,0xB2,0xE0,
+ 0xA0,0x32,0x71,0xE0,0x81,0x02,0x40,0x20,0x02,0x20,0xB2,0xE0,0x20,0x32,0x71,0xE0,
+ 0x01,0x02,0x40,0x20,0x02,0x20,0xB2,0xE0,0xA0,0x31,0x71,0xE0,0x81,0x01,0x40,0x20,
+ 0x02,0x20,0xB2,0xE0,0x20,0x31,0x71,0xE0,0x01,0x01,0x40,0x20,0x02,0x20,0xB2,0xE0,
+ 0xA0,0x30,0x71,0xE0,0x81,0x00,0x40,0x20,0x02,0x20,0xB2,0xE0,0x01,0x10,0x50,0xE0,
+ 0x00,0x10,0xA0,0x31,0x02,0x00,0xA2,0xE0,0x1E,0xFF,0x2F,0xE1,0x02,0x21,0x11,0xE2,
+ 0x00,0x10,0x61,0x42,0x40,0xC0,0x32,0xE0,0x00,0x00,0x60,0x22,0x20,0x32,0x71,0xE0,
+ 0x1D,0x00,0x00,0x3A,0x20,0x34,0x71,0xE0,0x0F,0x00,0x00,0x3A,0x01,0x13,0xA0,0xE1,
+ 0x20,0x34,0x71,0xE0,0x3F,0x23,0x82,0xE3,0x0B,0x00,0x00,0x3A,0x01,0x13,0xA0,0xE1,
+ 0x20,0x34,0x71,0xE0,0x3F,0x26,0x82,0xE3,0x07,0x00,0x00,0x3A,0x01,0x13,0xA0,0xE1,
+ 0x20,0x34,0x71,0xE0,0x3F,0x29,0x82,0xE3,0x01,0x13,0xA0,0x21,0x3F,0x2C,0x82,0x23,
+ 0x00,0x30,0x71,0xE2,0x1D,0x00,0x00,0x2A,0x21,0x13,0xA0,0x21,0xA0,0x33,0x71,0xE0,
+ 0x81,0x03,0x40,0x20,0x02,0x20,0xB2,0xE0,0x20,0x33,0x71,0xE0,0x01,0x03,0x40,0x20,
+ 0x02,0x20,0xB2,0xE0,0xA0,0x32,0x71,0xE0,0x81,0x02,0x40,0x20,0x02,0x20,0xB2,0xE0,
+ 0x20,0x32,0x71,0xE0,0x01,0x02,0x40,0x20,0x02,0x20,0xB2,0xE0,0xA0,0x31,0x71,0xE0,
+ 0x81,0x01,0x40,0x20,0x02,0x20,0xB2,0xE0,0x20,0x31,0x71,0xE0,0x01,0x01,0x40,0x20,
+ 0x02,0x20,0xB2,0xE0,0xEB,0xFF,0xFF,0x2A,0xA0,0x30,0x71,0xE0,0x81,0x00,0x40,0x20,
+ 0x02,0x20,0xB2,0xE0,0x01,0x10,0x50,0xE0,0x00,0x10,0xA0,0x31,0x02,0x00,0xA2,0xE0,
+ 0xCC,0xCF,0xB0,0xE1,0x00,0x00,0x60,0x42,0x00,0x10,0x61,0x22,0x1E,0xFF,0x2F,0xE1,
+ 0xCC,0xCF,0xB0,0xE1,0x00,0x00,0x60,0x42,0x01,0x40,0x2D,0xE9,0x00,0x00,0xB0,0xE3,
+ 0x00,0x00,0xA0,0xE1,0x02,0x80,0xBD,0xE8,0x00,0x20,0xB0,0xE3,0x20,0x32,0x71,0xE0,
+ 0xB4,0xFF,0xFF,0x3A,0x20,0x34,0x71,0xE0,0xA6,0xFF,0xFF,0x3A,0x00,0xC0,0xA0,0xE3,
+ 0xC5,0xFF,0xFF,0xEA,0x00,0x00,0x00,0x00,0x32,0x30,0x31,0x31,0x31,0x31,0x32,0x38,
+};
+
+int main(int argc, char *argv[])
+{
+ int fd_in = -1;
+ int fd_out = -1;
+
+ if (argc != 3) {
+ printf("Usage: %s <in.bin> <out.bin>\n", argv[0]);
+ return 0;
+ }
+
+ do {
+ const char *inFile = argv[1];
+ const char *outFile = argv[2];
+
+ fd_in = open(inFile, O_RDONLY);
+ if (fd_in < 0) break;
+
+ int r_sz = read(fd_in, buf+BL2_OFFSET, BL2_SIZE-4);
+ if (r_sz == -1) break;
+
+ int in_size = lseek(fd_in, 0, SEEK_END);
+ if (in_size > r_sz) {
+ printf("WARNING: Cut head %d of %dbytes(%s)\n",
+ r_sz, in_size, inFile);
+ }
+
+ close(fd_in);
+ fd_in = -1;
+
+ unsigned int checksum = 0;
+ for (int i = 0; i < r_sz; i++)
+ checksum += buf[BL2_OFFSET+i];
+ memcpy(&buf[BL2_OFFSET+BL2_SIZE-4], &checksum, 4);
+
+ remove(outFile);
+ fd_out = open(outFile, O_CREAT|O_WRONLY|O_TRUNC, 0664);
+ if (fd_out < 0) break;
+
+ int w_sz = write(fd_out, buf, sizeof(buf));
+ if (w_sz != sizeof(buf)) break;
+
+ close(fd_out);
+ fd_out = -1;
+
+ return 0;
+ } while (0);
+
+ if (fd_in >= 0)
+ close(fd_in);
+
+ if (fd_out >= 0)
+ close(fd_out);
+
+ printf("Failed!\n");
+ return -1;
+}
2.3.14 configs/tiny4412_defconfig
添加tiny4412板子的默认配置文件。
diff --git a/configs/tiny4412_defconfig b/configs/tiny4412_defconfig
new file mode 100644
index 0000000000..ccd50ee90d
--- /dev/null
+++ b/configs/tiny4412_defconfig
@@ -0,0 +1,59 @@
+CONFIG_ARM=y
+CONFIG_SYS_ARM_CACHE_WRITETHROUGH=y
+CONFIG_ARCH_CPU_INIT=y
+CONFIG_ARCH_EXYNOS=y
+CONFIG_SYS_TEXT_BASE=0x40000000
+CONFIG_ARCH_EXYNOS4=y
+CONFIG_TARGET_TINY4412=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_ENV_SIZE=0x10000
+CONFIG_ENV_OFFSET=0xF0000
+CONFIG_SPL_TEXT_BASE=0x02023400
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL_SIZE_LIMIT=0x37fc
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0x13800000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_IDENT_STRING=" for Tiny4412"
+CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_DEVICE_TREE="exynos4412-tiny4412"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySAC0,921600 earlyprintk root=/dev/ram rw initrd=0x44000000,8M"
+CONFIG_BOOTCOMMAND="mw 110002a0 10000 && mw 110002a4 00 && mmc rescan && mmc dev 2 && load mmc 2 40008000 zImage && load mmc 2 42000000 exynos4412-tiny4412.dtb && load mmc 2 44000000 ramdisk && mw 110002a4 10 && bootz 40008000 - 42000000"
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_BOARD_TYPES=y
+# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SYS_PROMPT="Tiny4412 # "
+CONFIG_CMD_CONFIG=y
+CONFIG_CMD_LICENSE=y
+CONFIG_BOOTM_OPENRTOS=y
+CONFIG_BOOTM_OSE=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_ADTIMG=y
+CONFIG_CMD_SPL=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_NET is not set
+CONFIG_CMD_CACHE=y
+# CONFIG_CMD_MISC is not set
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_OF_CONTROL=y
+CONFIG_DFU_MMC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_S5P=y
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_BAUDRATE=921600
+CONFIG_CONS_INDEX=0
+CONFIG_SERIAL_RX_BUFFER=y
+CONFIG_SERIAL_RX_BUFFER_SIZE=4096
+CONFIG_DEBUG_UART_ANNOUNCE=y
2.3.15 include/configs/tiny4412.h
添加tiny4412板子头文件。
diff --git a/include/configs/tiny4412.h b/include/configs/tiny4412.h
new file mode 100755
index 0000000000..9731ffaf9f
--- /dev/null
+++ b/include/configs/tiny4412.h
@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2020 xkwy2018.cn
+ *
+ * Configuration settings for the xkwy Tiny4412 (EXYNOS4412) board.
+ */
+
+#ifndef __CONFIG_TINY4412_H
+#define __CONFIG_TINY4412_H
+
+#include <configs/exynos4-common.h>
+
+#define CONFIG_EXYNOS4210 1 /* for spl dmc&clock */
+
+#define CONFIG_MACH_TYPE MACH_TYPE_TINY4412
+
+#define CONFIG_CLK_1000_400_200
+
+/* Dual Samsung's DDR3 K4B4G1646D-BCK0 (total: 8Gbit) */
+#define PHYS_SDRAM_1 0x40000000
+#define SDRAM_BANK_SIZE SZ_1G
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32M)
+#define CONFIG_LOADADDR 0x42000000
+
+
+/* copy form \linux\kernel\4.15.12\drivers\tty\tty_baudrate.c static const speed_t baud_table[] */
+#define CONFIG_SYS_BAUDRATE_TABLE {0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800, \
+ 9600, 19200, 38400, 57600, 115200, 230400, 460800, \
+ 500000, 576000, 921600, 1000000, 1152000, 1500000, 2000000, \
+ 2500000, 3000000, 3500000, 4000000}
+
+#define CONFIG_SYS_MONITOR_BASE 0x00000000
+
+/* Power Down Modes */
+#define S5P_CHECK_SLEEP 0x00000BAD
+#define S5P_CHECK_DIDLE 0xBAD00000
+#define S5P_CHECK_LPA 0xABAD0000
+
+
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
+
+#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
+
+/*
+ * SD Card layout:
+ * +-----+-----+----------+-----+----------------+-------+
+ * | 0K5 | 8K | 14K(BL2) | 1K5 | 936KiB | 64K |
+ * | MBR | BL1 | spl.bin | | u-boot-dtb.bin | u-env |
+ * +-----+-----+----------+-----+----------------+-------+
+ *
+ * eMMC layout: (Boot Capacity: 4 MiB ENH)
+ * +-----+----------+-----------+----------------+-------+
+ * | 8K | 14K(BL2) | 2K | 936KiB | 64K |
+ * | BL1 | spl.bin | | u-boot-dtb.bin | u-env |
+ * +-----+----------+-----------+----------------+-------+
+ */
+/* U-Boot copy size from boot Media to DRAM.*/
+#define BL2_START_OFFSET (1 + 0x6000/512)
+#define BL2_SIZE_BLOC_COUNT (936*2)
+
+#endif /* __CONFIG_H */
3 配置、编译、下载、测试
3.1 配置
$ make CROSS_COMPILE=arm-xkwy-linux-gnueabi- tiny4412_defconfig
HOSTCC scripts/basic/fixdep
HOSTCC scripts/kconfig/conf.o
YACC scripts/kconfig/zconf.tab.c
LEX scripts/kconfig/zconf.lex.c
HOSTCC scripts/kconfig/zconf.tab.o
HOSTLD scripts/kconfig/conf
#
# configuration written to .config
#3.2 编译
$ make CROSS_COMPILE=arm-xkwy-linux-gnueabi- -j8
scripts/kconfig/conf --syncconfig Kconfig
UPD include/config.h
CFG u-boot.cfg
GEN include/autoconf.mk.dep
CFG spl/u-boot.cfg
GEN include/autoconf.mk
GEN spl/include/autoconf.mk
UPD include/generated/dt.h
UPD include/generated/timestamp_autogenerated.h
UPD include/config/uboot.release
UPD include/generated/version_autogenerated.h
HOSTCC scripts/bin2c
HOSTCC scripts/dtc/flattree.o
HOSTCC scripts/dtc/dtc.o
HOSTCC scripts/dtc/fstree.o
HOSTCC scripts/dtc/data.o
HOSTCC scripts/dtc/livetree.o
HOSTCC scripts/dtc/treesource.o
HOSTCC scripts/dtc/srcpos.o
HOSTCC scripts/dtc/checks.o
HOSTCC scripts/dtc/util.o
LEX scripts/dtc/dtc-lexer.lex.c
YACC scripts/dtc/dtc-parser.tab.h
CC lib/asm-offsets.s
CC arch/arm/lib/asm-offsets.s
YACC scripts/dtc/dtc-parser.tab.c
HOSTCC scripts/dtc/dtc-lexer.lex.o
UPD include/generated/generic-asm-offsets.h
UPD include/generated/asm-offsets.h
LDS u-boot.lds
HOSTCC scripts/dtc/dtc-parser.tab.o
HOSTLD scripts/dtc/dtc
HOSTCC tools/img2srec
HOSTCC tools/mkenvimage.o
HOSTCC tools/os_support.o
WRAP tools/lib/crc32.c
HOSTCC tools/aisimage.o
HOSTCC tools/atmelimage.o
WRAP tools/common/fdt_region.c
WRAP tools/common/bootm.c
HOSTCC tools/default_image.o
WRAP tools/lib/fdtdec_common.c
WRAP tools/lib/fdtdec.c
WRAP tools/common/image.c
HOSTCC tools/imagetool.o
HOSTCC tools/imximage.o
HOSTCC tools/imx8image.o
HOSTCC tools/imx8mimage.o
HOSTCC tools/kwbimage.o
WRAP tools/lib/md5.c
HOSTCC tools/lpc32xximage.o
HOSTCC tools/mxsimage.o
HOSTCC tools/omapimage.o
HOSTCC tools/pblimage.o
HOSTCC tools/pbl_crc32.o
HOSTCC tools/vybridimage.o
HOSTCC tools/stm32image.o
WRAP tools/lib/rc4.c
HOSTCC tools/rkcommon.o
HOSTCC tools/rkimage.o
HOSTCC tools/rksd.o
HOSTCC tools/rkspi.o
HOSTCC tools/socfpgaimage.o
WRAP tools/lib/crc16.c
WRAP tools/lib/sha1.c
WRAP tools/lib/sha256.c
WRAP tools/common/hash.c
HOSTCC tools/ublimage.o
HOSTCC tools/zynqimage.o
HOSTCC tools/zynqmpimage.o
HOSTCC tools/zynqmpbif.o
HOSTCC tools/libfdt/fdt.o
HOSTCC tools/libfdt/fdt_ro.o
HOSTCC tools/libfdt/fdt_wip.o
HOSTCC tools/libfdt/fdt_sw.o
HOSTCC tools/libfdt/fdt_rw.o
HOSTCC tools/libfdt/fdt_strerror.o
HOSTCC tools/libfdt/fdt_empty_tree.o
HOSTCC tools/libfdt/fdt_addresses.o
HOSTCC tools/libfdt/fdt_overlay.o
HOSTCC tools/gpimage.o
HOSTCC tools/gpimage-common.o
HOSTCC tools/mtk_image.o
HOSTCC tools/dumpimage.o
HOSTCC tools/common/fdt_region.o
HOSTCC tools/common/bootm.o
HOSTCC tools/lib/crc32.o
HOSTCC tools/lib/fdtdec_common.o
HOSTCC tools/lib/fdtdec.o
HOSTCC tools/common/image.o
HOSTCC tools/lib/md5.o
HOSTCC tools/lib/rc4.o
HOSTCC tools/lib/crc16.o
HOSTCC tools/lib/sha1.o
HOSTCC tools/lib/sha256.o
HOSTCC tools/common/hash.o
HOSTCC tools/mkimage.o
HOSTCC tools/proftool
HOSTCC tools/fdtgrep.o
HOSTCC tools/spl_size_limit
HOSTLD tools/mkenvimage
HOSTLD tools/fdtgrep
HOSTLD tools/dumpimage
HOSTLD tools/mkimage
LD arch/arm/cpu/built-in.o
CC arch/arm/cpu/armv7/cache_v7.o
AS arch/arm/cpu/armv7/cache_v7_asm.o
CC arch/arm/cpu/armv7/cpu.o
CC arch/arm/cpu/armv7/cp15.o
AS arch/arm/lib/vectors.o
CC arch/arm/cpu/armv7/s5p-common/cpu_info.o
CC arch/arm/mach-exynos/soc.o
CC board/samsung/common/board.o
AS arch/arm/lib/crt0.o
CC arch/arm/cpu/armv7/syslib.o
AS arch/arm/lib/setjmp.o
AS arch/arm/lib/relocate.o
CC arch/arm/lib/bootm-fdt.o
CC arch/arm/mach-exynos/clock.o
CC arch/arm/cpu/armv7/s5p-common/timer.o
CC arch/arm/mach-exynos/pinmux.o
AS arch/arm/cpu/armv7/sctlr.o
CC arch/arm/lib/bootm.o
CC arch/arm/mach-exynos/power.o
CC arch/arm/mach-exynos/system.o
AS arch/arm/cpu/armv7/start.o
CC arch/arm/cpu/armv7/s5p-common/sromc.o
LD board/samsung/common/built-in.o
CC arch/arm/cpu/armv7/s5p-common/pwm.o
CC board/samsung/tiny4412/tiny4412.o
LD cmd/arm/built-in.o
CC cmd/boot.o
CC cmd/bootm.o
CC arch/arm/lib/zimage.o
AS arch/arm/lib/memset.o
LD board/samsung/tiny4412/built-in.o
AS arch/arm/lib/memcpy.o
CC cmd/help.o
CC cmd/version.o
CC cmd/blk_common.o
LD arch/arm/cpu/armv7/s5p-common/built-in.o
LD arch/arm/cpu/armv7/built-in.o
CC arch/arm/lib/sections.o
CC arch/arm/lib/stack.o
CC cmd/source.o
CC cmd/bdinfo.o
CC cmd/blkcache.o
CC cmd/bootefi.o
CC cmd/bootmenu.o
CC arch/arm/lib/interrupts.o
CC common/init/board_init.o
CC cmd/bootz.o
CC common/main.o
CC disk/part.o
LD common/init/built-in.o
LD arch/arm/mach-exynos/built-in.o
CC common/exports.o
LD drivers/adc/built-in.o
CC common/hash.o
LD drivers/ata/built-in.o
LD drivers/dma/ti/built-in.o
LD drivers/axi/built-in.o
CC arch/arm/lib/reset.o
CC drivers/block/blk-uclass.o
LD drivers/dma/built-in.o
CC arch/arm/lib/cache.o
CC common/cli_hush.o
CC cmd/cache.o
CC disk/part_dos.o
CC common/autoboot.o
CC arch/arm/lib/cache-cp15.o
CC disk/part_iso.o
GZIP cmd/config_data.gz
UPD cmd/config_data_size.h
CC arch/arm/lib/psci-dt.o
CC cmd/console.o
CC disk/part_efi.o
AS arch/arm/lib/ashldi3.o
AS arch/arm/lib/ashrdi3.o
CC cmd/dm.o
CC arch/arm/lib/div0.o
CC drivers/block/blkcache.o
CC cmd/adtimg.o
AS arch/arm/lib/div64.o
CC common/board_f.o
CC common/board_r.o
AS arch/arm/lib/lib1funcs.o
AS arch/arm/lib/lshrdi3.o
AS arch/arm/lib/muldi3.o
AS arch/arm/lib/uldivmod.o
CC arch/arm/lib/eabi_compat.o
LD drivers/block/built-in.o
LD drivers/cache/built-in.o
CC cmd/echo.o
AS arch/arm/lib/crt0_arm_efi.o
CC drivers/core/device.o
CC arch/arm/lib/reloc_arm_efi.o
LD arch/arm/lib/built-in.o
AR arch/arm/lib/lib.a
CC cmd/elf.o
CC cmd/exit.o
CC common/board_info.o
CC drivers/gpio/gpio-uclass.o
CC drivers/i2c/i2c-uclass.o
LD drivers/net/mscc_eswitch/built-in.o
LD drivers/net/ti/built-in.o
CC drivers/gpio/s5p_gpio.o
CC drivers/net/eth-phy-uclass.o
CC cmd/ext4.o
CC common/bootm.o
LD drivers/net/built-in.o
CC cmd/ext2.o
LD disk/built-in.o
CC drivers/core/fdtaddr.o
CC cmd/fat.o
CC cmd/fdt.o
CC cmd/fs.o
CC drivers/core/lists.o
LD drivers/i2c/built-in.o
CC drivers/core/root.o
LD drivers/net/phy/built-in.o
CC drivers/core/uclass.o
LD drivers/power/built-in.o
CC common/bootm_os.o
LD drivers/power/battery/built-in.o
LD drivers/power/domain/built-in.o
LD drivers/power/fuel_gauge/built-in.o
LD drivers/gpio/built-in.o
LD drivers/power/mfd/built-in.o
LD drivers/power/pmic/built-in.o
CC common/fdt_support.o
CC cmd/itest.o
GZIP cmd/license_data.gz
CC drivers/core/util.o
CC drivers/core/device-remove.o
UPD cmd/license_data_size.h
CC cmd/load.o
LD drivers/power/regulator/built-in.o
CC drivers/core/simple-bus.o
CC drivers/serial/serial-uclass.o
CC drivers/core/dump.o
CC drivers/serial/serial_s5p.o
CC common/splash.o
CC common/menu.o
CC cmd/mem.o
CC drivers/core/of_extra.o
CC drivers/core/ofnode.o
CC drivers/core/read_extra.o
LD drivers/serial/built-in.o
CC drivers/spi/spi-uclass.o
CC cmd/mmc.o
LD drivers/usb/cdns3/built-in.o
CC cmd/legacy-mtd-utils.o
LD drivers/usb/common/built-in.o
CC common/cli_readline.o
CC drivers/spi/spi-mem.o
CC cmd/part.o
CC common/cli_simple.o
CC common/bouncebuf.o
CC common/console.o
LD drivers/spi/built-in.o
CC common/dlmalloc.o
LD drivers/usb/dwc3/built-in.o
CC common/malloc_simple.o
CC common/image.o
LD drivers/core/built-in.o
CC common/image-fdt.o
CC drivers/crypto/fsl/sec.o
LD drivers/crypto/rsa_mod_exp/built-in.o
CC common/memsize.o
CC cmd/pxe.o
LD drivers/crypto/fsl/built-in.o
LD drivers/crypto/built-in.o
CC cmd/pxe_utils.o
CC drivers/dfu/dfu.o
CC drivers/input/key_matrix.o
CC cmd/sf.o
LD drivers/mailbox/built-in.o
CC common/stdio.o
LD drivers/memory/built-in.o
CC drivers/input/input.o
LD drivers/misc/built-in.o
CC cmd/setexpr.o
CC cmd/sysboot.o
CC drivers/dfu/dfu_mmc.o
CC common/image-android-dt.o
CC common/cli.o
CC drivers/mmc/mmc.o
CC drivers/mmc/mmc-uclass.o
CC drivers/input/keyboard-uclass.o
CC common/command.o
CC drivers/mmc/mmc_write.o
CC cmd/test.o
CC cmd/ximg.o
LD drivers/input/built-in.o
LD drivers/mtd/nand/built-in.o
LD drivers/mtd/onenand/built-in.o
CC drivers/mtd/spi/sf-uclass.o
CC drivers/mtd/spi/sf_probe.o
CC cmd/spl.o
LD drivers/dfu/built-in.o
CC drivers/mtd/spi/spi-nor-ids.o
CC common/s_record.o
CC common/xyzModem.o
CC drivers/mmc/mmc_boot.o
CC cmd/dfu.o
CC drivers/mtd/spi/spi-nor-core.o
CC drivers/mmc/dw_mmc.o
LD drivers/usb/emul/built-in.o
CC drivers/mmc/exynos_dw_mmc.o
LD drivers/usb/eth/built-in.o
CC drivers/mmc/rpmb.o
LD drivers/usb/host/built-in.o
CC drivers/mmc/sdhci.o
CC cmd/gpt.o
LD common/built-in.o
CC drivers/mmc/s5p_sdhci.o
CC cmd/nvedit.o
LD drivers/usb/musb-new/built-in.o
LD drivers/usb/musb/built-in.o
LD drivers/phy/allwinner/built-in.o
LD drivers/phy/marvell/built-in.o
LD drivers/phy/rockchip/built-in.o
LD drivers/reset/built-in.o
LD drivers/pwm/built-in.o
CC drivers/rtc/rtc-lib.o
LD drivers/scsi/built-in.o
LD drivers/smem/built-in.o
LD drivers/soc/built-in.o
LD drivers/sound/built-in.o
LD drivers/spmi/built-in.o
LD drivers/usb/phy/built-in.o
UPD cmd/config_data_gz.h
LD drivers/thermal/built-in.o
LD drivers/ufs/built-in.o
LD drivers/usb/ulpi/built-in.o
LD drivers/video/bridge/built-in.o
LD drivers/video/sunxi/built-in.o
CC drivers/watchdog/s5p_wdt.o
LD drivers/mmc/built-in.o
LD drivers/video/built-in.o
CC env/common.o
UPD cmd/license_data_gz.h
CC fs/ext4/ext4fs.o
LD lib/crypto/built-in.o
CC fs/fat/fat_write.o
LD drivers/mtd/spi/spi-nor.o
LD drivers/rtc/built-in.o
CC lib/efi_driver/efi_uclass.o
LD drivers/mtd/spi/built-in.o
CC lib/efi_driver/efi_block_device.o
LD drivers/mtd/built-in.o
LD drivers/watchdog/built-in.o
CC lib/efi_loader/efi_bootmgr.o
LD drivers/built-in.o
CC cmd/config.o
CC env/env.o
CC fs/fs.o
CC lib/efi_loader/efi_boottime.o
LD lib/efi_driver/built-in.o
CC cmd/license.o
CC fs/fs_internal.o
CC lib/libfdt/fdt.o
CC fs/ext4/ext4_common.o
CC env/attr.o
LD cmd/built-in.o
CC lib/libfdt/fdt_ro.o
CC net/arp.o
CC env/flags.o
CC env/callback.o
CC net/eth-uclass.o
CC env/mmc.o
CC net/eth_common.o
CC fs/ext4/dev.o
CC fs/ext4/ext4_write.o
LD env/built-in.o
CC net/net.o
CC lib/zlib/zlib.o
CC lib/libfdt/fdt_wip.o
CC lib/charset.o
CC lib/libfdt/fdt_strerror.o
CC lib/libfdt/fdt_sw.o
CC lib/crc8.o
CC lib/crc16.o
LD net/built-in.o
LD fs/fat/built-in.o
CC lib/smbios.o
CC lib/libfdt/fdt_rw.o
CC lib/libfdt/fdt_empty_tree.o
CC lib/libfdt/fdt_addresses.o
CC fs/ext4/ext4_journal.o
CC fs/ext4/crc16.o
CC lib/efi_loader/efi_console.o
CC lib/ldiv.o
CC lib/efi_loader/efi_device_path.o
CC lib/efi_loader/efi_device_path_to_text.o
CC lib/net_utils.o
CC lib/efi_loader/efi_device_path_utilities.o
CC lib/rc4.o
CC lib/efi_loader/efi_file.o
LD lib/libfdt/built-in.o
CC lib/sha256.o
CC lib/efi_loader/efi_hii.o
CC lib/list_sort.o
LD fs/ext4/built-in.o
LD fs/built-in.o
CC lib/efi_loader/efi_hii_config.o
CC lib/gunzip.o
LD lib/zlib/built-in.o
CC lib/fdtdec_common.o
CC lib/fdtdec.o
CC lib/efi_loader/efi_image_loader.o
CC lib/efi_loader/efi_memory.o
CC lib/qsort.o
CC lib/efi_loader/efi_root_node.o
CC lib/efi_loader/efi_runtime.o
CC lib/hashtable.o
CC lib/errno.o
CC lib/display_options.o
CC lib/efi_loader/efi_setup.o
CC lib/efi_loader/efi_unicode_collation.o
CC lib/crc32.o
CC lib/efi_loader/efi_variable.o
CC lib/ctype.o
CC lib/efi_loader/efi_watchdog.o
CC lib/div64.o
CC lib/hang.o
CC lib/linux_compat.o
CC lib/linux_string.o
CC lib/lmb.o
CC lib/membuff.o
CC lib/slre.o
CC lib/efi_loader/efi_disk.o
CC lib/string.o
CC lib/efi_loader/efi_net.o
CC lib/tables_csum.o
CC lib/time.o
CC lib/efi_loader/efi_smbios.o
CC lib/efi_loader/efi_signature.o
CC lib/hexdump.o
CC lib/efi_loader/helloworld.o
CC lib/uuid.o
AS lib/efi_loader/efi_crt0.o
CC lib/rand.o
CC lib/efi_loader/efi_reloc.o
CC lib/panic.o
CC lib/efi_loader/efi_freestanding.o
LD lib/efi_loader/built-in.o
CC lib/vsprintf.o
CC lib/strto.o
CC lib/date.o
CC lib/elf.o
LD lib/efi_loader/helloworld_efi.so
OBJCOPY lib/efi_loader/helloworld.efi
LD lib/built-in.o
CC examples/standalone/hello_world.o
CC examples/standalone/stubs.o
LD examples/standalone/libstubs.o
LD examples/standalone/hello_world
OBJCOPY examples/standalone/hello_world.srec
OBJCOPY examples/standalone/hello_world.bin
LD u-boot
OBJCOPY u-boot.srec
OBJCOPY u-boot-nodtb.bin
SYM u-boot.sym
DTC arch/arm/dts/exynos4210-origen.dtb
DTC arch/arm/dts/exynos4210-smdkv310.dtb
DTC arch/arm/dts/exynos4210-universal_c210.dtb
DTC arch/arm/dts/exynos4210-trats.dtb
DTC arch/arm/dts/exynos4412-tiny4412.dtb
DTC arch/arm/dts/exynos4412-trats2.dtb
DTC arch/arm/dts/exynos4412-odroid.dtb
SHIPPED dts/dt.dtb
FDTGREP dts/dt-spl.dtb
CAT u-boot-dtb.bin
COPY u-boot.dtb
COPY u-boot.bin
CC spl/./lib/asm-offsets.s
CC spl/./arch/arm/lib/asm-offsets.s
LDS spl/u-boot-spl.lds
UPD spl/./include/generated/asm-offsets.h
UPD spl/./include/generated/generic-asm-offsets.h
LD spl/arch/arm/cpu/built-in.o
CC spl/arch/arm/mach-exynos/soc.o
LD spl/board/samsung/common/built-in.o
CC spl/common/init/board_init.o
AS spl/arch/arm/lib/vectors.o
LD spl/board/samsung/tiny4412/built-in.o
HOSTCC spl/board/samsung/tiny4412/tools/mktiny4412spl
CC spl/arch/arm/cpu/armv7/s5p-common/cpu_info.o
LD spl/dts/built-in.o
CC spl/drivers/block/blk_legacy.o
CC spl/fs/fs_internal.o
CC spl/drivers/gpio/s5p_gpio.o
AS spl/arch/arm/lib/crt0.o
LD spl/common/init/built-in.o
CC spl/arch/arm/mach-exynos/clock.o
AS spl/arch/arm/lib/setjmp.o
CC spl/arch/arm/lib/bootm-fdt.o
CC spl/arch/arm/cpu/armv7/cache_v7.o
LD spl/arch/arm/cpu/armv7/s5p-common/built-in.o
LD spl/drivers/mtd/built-in.o
AS spl/arch/arm/lib/memset.o
AS spl/arch/arm/cpu/armv7/cache_v7_asm.o
LD spl/fs/built-in.o
CC spl/arch/arm/cpu/armv7/cpu.o
AS spl/arch/arm/lib/memcpy.o
CC spl/arch/arm/mach-exynos/pinmux.o
LD spl/drivers/gpio/built-in.o
CC spl/arch/arm/cpu/armv7/cp15.o
CC spl/arch/arm/lib/sections.o
LD spl/drivers/block/built-in.o
CC spl/arch/arm/mach-exynos/power.o
CC spl/arch/arm/mach-exynos/system.o
CC spl/drivers/serial/serial.o
CC spl/arch/arm/lib/stack.o
CC spl/arch/arm/cpu/armv7/syslib.o
LD spl/drivers/soc/built-in.o
CC spl/arch/arm/lib/interrupts.o
AS spl/arch/arm/cpu/armv7/start.o
CC spl/arch/arm/mach-exynos/dmc_init_exynos4.o
CC spl/arch/arm/mach-exynos/clock_init_exynos4.o
LD spl/arch/arm/cpu/armv7/built-in.o
CC spl/arch/arm/mach-exynos/spl_boot.o
CC spl/drivers/serial/serial_s5p.o
CC spl/arch/arm/mach-exynos/tzpc.o
CC spl/arch/arm/lib/reset.o
CC spl/arch/arm/lib/cache.o
CC spl/arch/arm/mach-exynos/lowlevel_init.o
CC spl/arch/arm/lib/cache-cp15.o
CC spl/arch/arm/lib/psci-dt.o
AS spl/arch/arm/lib/ashldi3.o
AS spl/arch/arm/lib/ashrdi3.o
LD spl/drivers/serial/built-in.o
LD spl/drivers/built-in.o
CC spl/arch/arm/lib/div0.o
AS spl/arch/arm/lib/div64.o
AS spl/arch/arm/lib/lib1funcs.o
AS spl/arch/arm/lib/lshrdi3.o
AS spl/arch/arm/lib/muldi3.o
AS spl/arch/arm/lib/uldivmod.o
CC spl/arch/arm/lib/eabi_compat.o
AS spl/arch/arm/lib/crt0_arm_efi.o
CC spl/arch/arm/lib/reloc_arm_efi.o
LD spl/arch/arm/mach-exynos/built-in.o
LD spl/arch/arm/lib/built-in.o
AR spl/arch/arm/lib/lib.a
LD spl/u-boot-spl
OBJCOPY spl/u-boot-spl-nodtb.bin
COPY spl/u-boot-spl.bin
./spl/board/samsung/tiny4412/tools/mktiny4412spl spl/u-boot-spl.bin spl/tiny4412-spl.bin
CFGCHK u-boot.cfg
3.3 下载
SD卡烧录工具：https://xkwy2018.cn/tiny4412/u-boot/tools/tiny4412Fusing.sh
注意：执行此操作会擦除SD卡，请注意备份SD卡的文件。
$ wget https://xkwy2018.cn/tiny4412/u-boot/tools/tiny4412Fusing.sh
--2020-07-25 12:33:04-- https://xkwy2018.cn/tiny4412/u-boot/tools/tiny4412Fusing.sh
Resolving xkwy2018.cn (xkwy2018.cn)... 64.64.240.120
Connecting to xkwy2018.cn (xkwy2018.cn)|64.64.240.120|:443... connected.
HTTP request sent, awaiting response... 200 OK
Length: 1466 (1.4K) [text/x-sh]
Saving to: ‘tiny4412Fusing.sh’
tiny4412Fusing.sh 100%[====================================================>] 1.43K --.-KB/s in 0s
2020-07-25 12:33:09 (154 MB/s) - ‘tiny4412Fusing.sh’ saved [1466/1466]
$ chmod +x tiny4412Fusing.sh
$ ./tiny4412Fusing.sh -h
Usage: ./tiny4412Fusing.sh [-q] [-e] [-D <SD Reader''s device file>] [-d <u-boot source directory>]
$ ./tiny4412Fusing.sh -e -D /dev/mmcblk0 -d $PWD
erase count: 8191
u-boot: /dev/shm/u-boot-2020.07
/dev/mmcblk0: 120GiB
3809280 bytes (3.8 MB, 3.6 MiB) copied, 7 s, 544 kB/s
8191+0 records in
8191+0 records out
4193792 bytes (4.2 MB, 4.0 MiB) copied, 7.67944 s, 546 kB/s
44+0 records in
44+0 records out
22528 bytes (23 kB, 22 KiB) copied, 0.072426 s, 311 kB/s
679+1 records in
679+1 records out
347739 bytes (348 kB, 340 KiB) copied, 0.660174 s, 527 kB/s
3.4 SD卡启动测试
将SD卡插入开发板，将开发板启动方式开关拨到SD卡模式，上电，将会打印如下信息：
<debug_uart>
U-Boot 2020.07 (Jul 25 2020 - 12:39:46 +0800) for Tiny4412
CPU: Exynos4412 @ 1.4 GHz
Model: xkwy Tiny4412 based on Exynos4412
Type: 1506
DRAM: 1 GiB
MMC: SAMSUNG SDHCI: 2, EXYNOS DWMMC: 0
Loading Environment from MMC... *** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Boot device: MMC(2)
Hit any key to stop autoboot: 0
Tiny4412 #
3.5 查看板子信息
Tiny4412 # bdinfo
arch_number = 0x00001200
boot_params = 0x40000100
DRAM bank = 0x00000000
-> start = 0x40000000
-> size = 0x40000000
baudrate = 921600 bps
TLB addr = 0x7fff0000
relocaddr = 0x7ff8c000
reloc off = 0x3ff8c000
irq_sp = 0x7af78a10
sp start = 0x7af78a00
Board Type = 5382
Early malloc usage: f0 / 400
fdt_blob = 0x7af78a20
Build = 32-bit
Tiny4412 # 3.6 查看SD卡信息
Tiny4412 # mmc rescan
Tiny4412 # mmc dev 2
switch to partitions #0, OK
mmc2 is current device
Tiny4412 # mmc info
Device: SAMSUNG SDHCI
Manufacturer ID: 1b
OEM: 534d
Name: BD4QT
Bus Speed: 50000000
Mode: SD High Speed (50MHz)
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 119.3 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
Tiny4412 # 3.7 查看eMMC信息
Tiny4412 # mmc rescan
Tiny4412 # mmc dev 0
switch to partitions #0, OK
mmc0(part 0) is current device
Tiny4412 # mmc info
Device: EXYNOS DWMMC
Manufacturer ID: 15
OEM: 100
Name: M8G2F
Bus Speed: 52000000
Mode: MMC High Speed (52MHz)
Rd Block Len: 512
MMC version 4.4.1
High Capacity: Yes
Capacity: 7.4 GiB
Bus Width: 8-bit
Erase Group Size: 512 KiB
HC WP Group Size: 8 MiB
User Capacity: 7.4 GiB WRREL
Boot Capacity: 4 MiB ENH
RPMB Capacity: 4 MiB ENH
Boot area 0 is not write protected
Boot area 1 is not write protected
Tiny4412 # 3.8 eMMC启动
3.8.1 eMMC 配置
配置boot分区为4MB，配置boot_bus_width为1。
Tiny4412 # mmc bootpart-resize 0 4 4
Tiny4412 # mmc bootbus 0 1 0 0
Tiny4412 # 3.8.2 从SD卡读取U-Boot镜像，并烧录到eMMC BOOT1分区
Tiny4412 # mmc rescan
Tiny4412 # mmc dev 2
switch to partitions #0, OK
mmc2 is current device
Tiny4412 # mmc read 42000000 1 2000
MMC read: dev # 2, block # 1, count 8192 ... 8192 blocks read: OK
Tiny4412 # mmc dev 0
switch to partitions #0, OK
mmc0(part 0) is current device
Tiny4412 # mmc partconf 0 1 1 1
Tiny4412 # mmc erase 0 2000
MMC erase: dev # 0, block # 0, count 8192 ... 8192 blocks erased: OK
Tiny4412 # mmc write 42000000 0 2000
MMC write: dev # 0, block # 0, count 8192 ... 8192 blocks written: OK
Tiny4412 # 3.8.3 eMMC启动测试
将开发板启动方式拨码开关拨到NAND或eMMC模式，按下复位键或重启上电，将会打印如下信息：
（可以拔掉SD卡测试一下）
<debug_uart>
U-Boot 2020.07 (Jul 25 2020 - 12:39:46 +0800) for Tiny4412
CPU: Exynos4412 @ 1.4 GHz
Model: xkwy Tiny4412 based on Exynos4412
Type: 1506
DRAM: 1 GiB
MMC: sdhci@12530000 - probe failed: -19
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
Boot device: MMC(0)
Hit any key to stop autoboot: 0
Tiny4412 #
4 附录
4.1 交叉编译工具链
版本：gcc version 10.1.0 (xkwy-gcc-20200517)
$ arm-xkwy-linux-gnueabi-gcc -v
Using built-in specs.
COLLECT_GCC=arm-xkwy-linux-gnueabi-gcc
COLLECT_LTO_WRAPPER=/opt/xkwy-gcc/20200517/libexec/gcc/arm-xkwy-linux-gnueabi/10.1.0/lto-wrapper
Target: arm-xkwy-linux-gnueabi
Configured with: ../gcc-10.1.0/configure --prefix=/opt/xkwy-gcc/20200517 --target=arm-xkwy-linux-gnueabi --with-pkgversion=xkwy-gcc-20200517 --with-bugurl='https://xkwy2018.cn/gcc/bug-report.php?pkgversion=xkwy-gcc-20200517' --with-sysroot=/opt/xkwy-gcc/20200517/arm-xkwy-linux-gnueabi --enable-languages=c,c++ --with-arch=armv7-a --with-tune=cortex-a9 --with-fpu=vfpv3 --with-float=softfp --enable-threads=posix --quiet --silent
Thread model: posix
Supported LTO compression algorithms: zlib
gcc version 10.1.0 (xkwy-gcc-20200517) 4.1 源码
【U-Boot 2020.07原始源码】官方下载地址：ftp://ftp.denx.de/pub/u-boot/u-boot-2020.07.tar.bz2
【U-Boot 2020.07原始源码】xkwy2018.cn镜像地址：https://xkwy2018.cn/tiny4412/u-boot/2020.07-tiny4412/u-boot-2020.07.tar.bz2
【tin4412 patch】下载地址：https://xkwy2018.cn/tiny4412/u-boot/2020.07-tiny4412/u-boot-2020.07-tiny4412.patch
【已打好patch源码包】下载地址：https://xkwy2018.cn/tiny4412/u-boot/2020.07-tiny4412/u-boot-2020.07-tiny4412.tar.xz
4.2 已编译好的二进制镜像
下载地址：https://xkwy2018.cn/tiny4412/u-boot/2020.07-tiny4412/build/
烧录到SD卡只需要u-boot-dtb.bin和spl/tiny4412-spl.bin，注意下载后保持文件相对位置。
4.3 SD卡烧录工具
下载地址：https://xkwy2018.cn/tiny4412/u-boot/tools/tiny4412Fusing.sh
4.3.1 使用方法
- -h 查看帮助信息
- -q 安静模式，执行烧录时不打印过程信息
- -e 烧录前彻底擦除4MB空间，适用于第一次烧录
- -D <SD Reader's device file> 指定SD卡设备文件，默认为/dev/mmcblk0，实际SD卡设备文件名可使用lsblk命令查看
- -d <u-boot source directory> 指定U-Boot源码目录，默认为/works/u-boot，脚本会向该目录找u-boot-dtb.bin和spl/tiny4412-spl.bin
4.4 开发板原理图
下载地址：https://xkwy2018.cn/tiny4412/Schematic-PCB/
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