gd32DMA串口回显

 #include"stdio.h"                                                                                                                   
    #include"gd32f30x.h"                                                                                                                
    #include"keydiver.h"
    int n;		
    unsigned char recvbuff[128]={0};                                                                                                    
    unsigned char data0[10]={1,2,3,4,5,6,7,8,9,0};                                                                                      
		unsigned char data1[10]={0};                                                                                                        
		volatile int dmasending=0;                                                                                                          
		dma_parameter_struct dmatxcfg;                                                                                                      
		dma_parameter_struct dmarxcfg;                                                                                                             
		dma_parameter_struct dmacfg;                                                                                                               
		unsigned char* pdata=0;                                                                                                                    
		unsigned char data2[10]={0};                                                                                                               
	  void usartdmasend(unsigned char *pdata,int nlen)                                                                                           
		{                                                                                                                                          
			dmasending=1;                                                                                                                            
			dma_channel_disable(DMA0,DMA_CH3);                                                                                                       
			dmatxcfg.memory_addr=(uint32_t)pdata;                                                                                                    
			dmatxcfg.number=nlen;                                                                                                                    
			dma_init(DMA0,DMA_CH3,&dmatxcfg);                                                                                                        
			dma_channel_enable(DMA0,DMA_CH3);                                                                                                        
			while(dmasending);                                                                                                                       
		}                                                                                                                                          
		void DMA0_Channel3_IRQHandler()                                                                                                     
{	                                                                                                                                      
		if(dma_interrupt_flag_get(DMA0,DMA_CH3,DMA_INT_FLAG_FTF))                                                                           
			{                                                                                                                                 
			dma_interrupt_flag_clear(DMA0,DMA_CH3,DMA_INT_FLAG_FTF);                                                                          
      dmasending=0;                                                                                                                     
		  }	                                                                                                                                
}                                                                                                                                       
void DMA0_Channel4_IRQHandler()                                                                                                         
{                                                                                                                                       
		if(dma_interrupt_flag_get(DMA0,DMA_CH4,DMA_INT_FLAG_FTF))                                                                           
		{                                                                                                                                   
			dma_interrupt_flag_clear(DMA0,DMA_CH4,DMA_INT_FLAG_FTF);                                                                          
			dma_channel_disable(DMA0,DMA_CH4);                                                                                                
			dma_init(DMA0,DMA_CH4,&dmarxcfg);                                                                                                 
			dma_channel_enable(DMA0,DMA_CH4);                                                                                                 
			//usartdmasend(recvbuff,128);                                                                                                       
		}                                                                                                                                   
}                                                                                                                                       
void USART0_IRQHandler()                                                                                                                
{                                                                                                                                       
		                                                                                   
	  if(usart_interrupt_flag_get(USART0,USART_INT_FLAG_IDLE))                                                                            
    {                                                                                                                                   
		usart_interrupt_flag_clear(USART0,USART_INT_FLAG_IDLE);                                                                             
    usart_data_receive(USART0);                                                                                                         
		n=128-dma_transfer_number_get(DMA0,DMA_CH4);  																																								                                                    
    dma_channel_disable(DMA0,DMA_CH4);                                                                                                  
    dma_init(DMA0,DMA_CH4,&dmarxcfg);                                                                                                   
    dma_channel_enable(DMA0,DMA_CH4);                                                                                                   
	  usartdmasend(recvbuff,n);                                                                                                           
    }                                                                                                                                   
}                                                                                                                                       
		void usartdma()                                                                                                                     
		{                                                                                                                                   
		  rcu_periph_clock_enable(RCU_AF);                                                                                                  
			rcu_periph_clock_enable(RCU_GPIOA);                                                                                               
			gpio_init(GPIOA,GPIO_MODE_AF_PP,GPIO_OSPEED_10MHZ,GPIO_PIN_9);                                                                    
			gpio_init(GPIOA,GPIO_MODE_IPU,GPIO_OSPEED_10MHZ,GPIO_PIN_10);                                                                     
			rcu_periph_clock_enable(RCU_USART0);                                                                                              
			usart_deinit(USART0);                                                                                                             
			usart_baudrate_set(USART0,115200);                                                                                                
			usart_parity_config(USART0,USART_PM_NONE);                                                                                        
			usart_word_length_set(USART0,USART_WL_8BIT);                                                                                      
			usart_stop_bit_set(USART0,USART_STB_1BIT);                                                                                        
			usart_transmit_config(USART0,USART_TRANSMIT_ENABLE);                                                                              
			usart_receive_config(USART0,USART_RECEIVE_ENABLE);                                                                                
			usart_dma_transmit_config(USART0,USART_DENT_ENABLE);                                                                              
			usart_dma_receive_config(USART0,USART_DENR_ENABLE);                                                                               
			usart_interrupt_enable(USART0,USART_INT_IDLE);                                                                                    
			nvic_irq_enable(USART0_IRQn,2,2);                                                                                                 
			usart_enable(USART0);                                                                                                             
			rcu_periph_clock_enable(RCU_DMA0);                                                                                                
			dma_deinit(DMA0,DMA_CH3);                                                                                                     
			dmatxcfg.periph_addr  =USART0+0x04;//shift addrss (uint32_t)                                                                      
      dmatxcfg.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;                                                                                
      dmatxcfg.periph_inc   = DMA_PERIPH_INCREASE_DISABLE;                                                                              
      dmatxcfg.memory_addr  = (uint32_t)data1;                                                                                        
      dmatxcfg.memory_width = DMA_MEMORY_WIDTH_8BIT;                                                                                    
      dmatxcfg.memory_inc   = DMA_MEMORY_INCREASE_ENABLE;                                                                               
      dmatxcfg.number       = 10U;                                                                                                    
      dmatxcfg.direction    = DMA_MEMORY_TO_PERIPHERAL;                                                                                 
      dmatxcfg.priority     = DMA_PRIORITY_LOW;                                                                                         
			dma_interrupt_enable(DMA0,DMA_CH3,DMA_INT_FTF);                                                                                   
			nvic_irq_enable(DMA0_Channel3_IRQn,0,2);                                                                                          
			dma_init(DMA0,DMA_CH3,&dmatxcfg);		                                                                                              
			dma_deinit(DMA0,DMA_CH4);
dma_struct_para_init(&dmarxcfg);			
			dmarxcfg.periph_addr  =USART0+0x04;                                                                                               
      dmarxcfg.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;                                                                                
      dmarxcfg.periph_inc   = DMA_PERIPH_INCREASE_DISABLE;                                                                              
      dmarxcfg.memory_addr  = (uint32_t)recvbuff;//shift addrss (uint32_t)                                                              
      dmarxcfg.memory_width = DMA_MEMORY_WIDTH_8BIT;                                                                                    
      dmarxcfg.memory_inc   = DMA_MEMORY_INCREASE_ENABLE;                                                                               
      dmarxcfg.number       =128U;                                                                                                     
      dmarxcfg.direction    = DMA_MEMORY_TO_PERIPHERAL;                                                                                 
      dmarxcfg.priority     = DMA_PRIORITY_LOW;                                                                                         
      dma_interrupt_enable(DMA0,DMA_CH4,DMA_INT_FTF);                                                                                   
			nvic_irq_enable(DMA0_Channel4_IRQn,2,2);                                                                                          
			dma_init(DMA0,DMA_CH4,&dmarxcfg);                                                                                                 
    	dma_channel_enable(DMA0,DMA_CH4);                                                                                                 
		}                                                                                                                                   
int main()                                                                                                                              
{                                                                                                                                       
	usartdma();                                                                                                                           
	while(1){			                                                                                                                        
		//usartdmasend((unsigned char*)123,3);                                                                                                
          }                                                                                                                             
}                                                                                                                                       

                                           

usart0的接收对应channel4所以要配置channel4和pa10,然后配置接收中断，之后先进去先接收数据，数据接收完成后进入串口空闲中断，然后在串口空闲中断中发送刚才接收到的数据，发送完成接收的数据后，进入发送中断，将sending置0，这样就可以发送接收到的数据啦