Chapter 4,5 The Active and Poly Layers, Resistor, Capactors, MOSFETs

Chapter 4 The Active and Poly Layers

In a layout we can simply count the number of times poly crosses active to count the number of MOSFET in the layout. Poly跨过active area的次数就代表有多少根MOSFET

The FinFET

A thin (fixed width) fin of silicon is surrounded by a gate, generally implement using metal rather than poly, to provide control of the channels on three sides.

The Poly Wire

为了减少poly sheet resistance 可加入silicide (金半混合物)

隔离active area的叫field regions (FOX), also called Shallow Trench Isolation (STI)

In practice, substrate connections are used wherever possible 多打P-SUB的Contact!

Chapter 5 Resistor, Capactors, MOSFETs

Resistors

TCR1 first-order temperature coefficient

In general, temp co of resistor is positive, 即温度上升电阻上升, 因为载流子的mobilities下降更厉害

但是也不排除有negative temp co的电阻, 实际中还得看PDK文件

Voltage Coefficient

A typical value of VCR1 is 8000 ppm/V

一些提高resistor匹配的layout技巧:

• Using Unit Elements

• Guard Rings (Place P+ implant, the substrate contact removes the injected carries and holds the substrate, ideadly, at a fixed potential (ground).)

• Interdigitated Layout 插指状

• Common-Centroid Layout 中心对称

• Dummy Elements

Capacitors

Parasitic: 最大寄生电容就是poly1 to substrate (bottom plate parasitic capacitance)

MOSFE Ts

Lateral Diffusion: Leffctive = Ldrawn - 2Ldiff

Poly跨过active area的次数就代表有多少根MOSFET

Cgs=CGSO*W

Cgd = CGDO*W