CST-阻抗计算器

星辰满天映满月

已于 2024-07-12 16:00:33 修改

阅读量854

点赞数 22

分类专栏： CST仿真文章标签：硬件工程

于 2024-07-12 15:58:52 首次发布

本文链接：https://blog.csdn.net/AutopSim/article/details/140377277

版权

CST仿真专栏收录该内容

1 篇文章 0 订阅

订阅专栏

Home: Layout > Impedance Calculator

Edit: Check Layout > Impedance Calculator

CST阻抗计算器是根据PCB Studio叠层管理器中的参数信息来进行阻抗计算。

CST阻抗计算器中的一些参数信息：

1、关于微带结构的定义：

The Impedance Calculator distinguishes between two kind of metallic layer types: The “Signal” layer and the “Reference Plane”. A Signal layer always needs one or two Reference Planes for the definition of a line impedance (or in other words: there must be at least one additional conductor to propagate a TEM wave). A single Reference Plane in combination with a signal trace leads to a “Microstrip” configuration.

With two Reference Planes and a signal trace in between, the structure is called a “Stripline” configuration. In addition, the Impedance Calculator doesn't only regard the “Reference Plane” doesn’t as a passive return conductor for the signal layer. It also assumes transmission lines Reference Planes.

The return conductors for such transmission lines are assumed to be on the same layer, separated with a certain “Spacing”, what is called a “Co-planar” configuration.

这里需要注意的是在阻抗计算器中需要按照实际PCB结构定义参考层。

2、关于Trace Gap和Spacing的定义可以参考下图：

3、总线阻抗

If a signal trace is part of a bus, its line impedance is affected by the adjacent traces. By default, the Impedance Calculator assumes two further traces on either side which are floating (means they are assumed to be loaded by high ohmic resistors on both ends). The Bus Line impedance is based on the same formula as the single line impedance. The only difference is the inductance L and the capacitance C of the center trace which is now affected by the additional floating traces。

其假定两侧走线的两端是浮空的，考虑该阻抗线的两侧走线对其的影响，较正常单端阻抗会有一些影响。

4、共模/差模阻抗