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RSS订阅原创 HDLBits学习笔记—— Dualedge
触发器的最后一题，答案解法有点不好理解。题干：You're familiar with flip-flops that are triggered on the positive edge of the clock, or negative edge of the clock. A dual-edge triggered flip-flop is triggered on both edges of the clock. However, FPGAs don't have dual-edge tri
2022-05-19 20:17:49
2476
原创 HDLBits学习笔记——exams/ece241_2013_q2
题目：A single-output digital system with four inputs (a,b,c,d) generates a logic-1 when 2, 7, or 15 appears on the inputs, and a logic-0 when 0, 1, 4, 5, 6, 9, 10, 13, or 14 appears. The input conditions for the numbers 3, 8, 11, and 12 never occur in this
2022-05-17 17:35:31
860
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原创 HDLBits学习笔记——Mux256to1v
题目：Suppose you are designing a circuit to control a cellphone's ringer and vibration motor. Whenever the phone needs to ring from an incoming call (inputring), your circuit must either turn on the ringer (outputringer= 1) or the motor (outputmotor= 1)...
2022-05-15 17:03:08
596
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原创 HDLBits学习笔记——Ringer
题目：Suppose you are designing a circuit to control a cellphone's ringer and vibration motor. Whenever the phone needs to ring from an incoming call (inputring), your circuit must either turn on the ringer (outputringer= 1) or the motor (outputmotor= 1)...
2022-05-15 16:25:57
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