//********************tryfunct.v*********************
module tryfunct(clk,n,result,sl,reset);
output[31:0] result;
input[3:0] n;
input reset,clk;
input[1:0] sl;
reg[31:0] result;
always @(posedge clk)
begin
if(!reset) result<=0;
else begin
case(sl)
2'b00: result <= square(n);
2'b01: result <= cubic(n);
2'b10: result <= factorial(n);
default: result <= 32'bx;
endcase
end
end
function[31:0] square;
input[3:0] operand;
begin
square = operand * operand;
end
endfunction
function[31:0] cubic;
input[3:0] operand;
begin
cubic = operand * operand * operand;
end
endfunction
function[31:0] factorial;
input[3:0] operand;
reg[3:0] index;
begin
factorial = operand?1:0;
for(index=2;index<=operand;index=index+1)
factorial=index*factorial;
end
endfunction
endmodule
//********************tryfunct_TB.v*********************
`timescale 1ns / 100ps
`define clk_cycle 50
module tryfunct_TB;
reg[3:0] n,i;
reg reset,clk;
reg[1:0] sl;
wire[31:0] result;
initial
begin
clk=0;
n=0;
sl=0;
reset=1;
#100 reset=0;
#100 reset=1;
for(i=0;i<=5;i=i+1)
begin
#200 n=i;
end
#100 $stop;
end
always # (`clk_cycle*2) sl=sl+1;
always # `clk_cycle clk=~clk;
tryfunct m(clk, n, result, sl, reset);
endmodule