源代码:
module example_1(
input clk,
input [7:0] a_in,
output [7:0] b_out
);
reg [7:0]b_out;
reg [7:0]c;
always @(posedge clk)
begin
c<=a_in;
b_out<=c;
end
endmodule
激励文件:
module example_1tb(
);
reg clk;
reg [7:0] a;
wire [7:0] b;
integer i;//数组坐标
reg [7:0] st[1:32];//数组形式存储
initial
begin
$readmemh("F:/Project/example_1/B.txt",st);//°读取文件txt的值
i=0;
a=0;
repeat(32)//重复32次
begin
#80
i=i+1;
a=st[i];
end
end
initial
begin
clk=0;
end
always #40 clk=~clk;
example_1 u1(.clk(clk),.a_in(a),.b_out(b));
integer fp_write;//设置文柄
initial
begin
#130;//目的使fp_write中不写入XX。
fp_write=$fopen("F:/Project/example_1/C.txt","w");
//#120;
repeat (32)//没有仿真输出写够32个,文件C中是什么都没有。
begin
$fwrite(fp_write,"%H\n",b);//写数据
#80;
end
$fclose(fp_write);//文件写结束
end
endmodule
txt文件:B
11
22
33
44
55
66
77
88
99
AA
BB
CC
DD
EE
FF
a1
a2
a3
a4
a5
a6
a7
a8
b1
b2
b3
b4
b5
b6
b7
b8
cc
txt输出文件C:
00
11
22
33
44
55
66
77
88
99
aa
bb
cc
dd
ee
ff
a1
a2
a3
a4
a5
a6
a7
a8
b1
b2
b3
b4
b5
b6
b7
b8
最终仿真结果: