NXP(Freescale) QorIQ T2080 SRIO FRA程序分析

最新推荐文章于 2022-02-08 18:58:29 发布
最新推荐文章于 2022-02-08 18:58:29 发布
阅读量2.9k 收藏 7
点赞数
分类专栏： NXP(Freescale) T2080处理器开发 文章标签： t2080 srio fra
转载请关注我的-公众号-青儿创客基地-QQ技术交流群852283276
本文链接：https://blog.csdn.net/Zhu_Zhu_2009/article/details/91985236
版权

作者

QQ群：852283276
微信：arm80x86
微信公众号：青儿创客基地
B站：主页 https://space.bilibili.com/208826118

参考

A problem of sending SRIO doorbell, message by T2080

FRA

doorbell收发，新建fra配置文件，rman_cfg为默认配置，trans_cfg的type字段为Doorbell，flowlvl表示flow level为5，dists_cfg定义rman处理的消息，RMAN_RX和RMAN_TX，sid定义源id，did 定义目的id

<fra_cfg>
<!--	xxxxxxxxxxxxxxxxxxxx RMan hardware configuration xxxxxxxxxxxxxxxxxxx -->
	<rman_cfg>
		<defcfg file="/usr/etc/rman_config.xml"/>
	</rman_cfg>

<!--	transaction field described all the type transaction settings -->

	<trans_cfg>
		<!-- dbell setting -->
		<transaction name="dbell-peer" type="Doorbell">
			<flowlvl value="5" mask="1"/>
		</transaction>
	</trans_cfg>

	<dists_cfg>
<!--	xxxxxxxxxxxxxxxxxxxxxx RMAN RX distribution xxxxxxxxxxxxxxxxxxxxxxxx -->
		<distribution name="dbell_from_peer" type="RMAN_RX">
			<rio_port number="0" mask="1"/>
			<sid value="0x11" mask="0xff"/>
			<queue base="0x4100" mode="direct" wq="0"/>
			<transactionref name="dbell-peer"/>
		</distribution>

<!--	xxxxxxxxxxxxxxxxxxxxxxx RMAN TX distribution xxxxxxxxxxxxxxxxxxxxxxx -->
		<distribution name="dbell_to_peer" type="RMAN_TX">
			<rio_port number="0"/>
			<did value="0x11"/>
			<queue base="0x4200" count="4" wq="0"/>
			<transactionref name="dbell-peer"/>
		</distribution>
	</dists_cfg>

<!--	xxxxxxxxxxxxxxxxxxxxxxxxxx Policy xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx -->
	<policies_cfg>
		<policy name="peer-srio-peer" enable="yes">
			<dist_order>
				<distributionref name="dbell_to_peer"/>
				<distributionref name="dbell_from_peer"/>
			</dist_order>
		</policy>
	</policies_cfg>
</fra_cfg>

看一下rman_config.xml，

<rman_cfg>
	<fqbits type="Data-streaming" value="2"/>
	<fqbits type="Mailbox" value="2"/>
	<md_create mode="yes"/>
	<!--
	OSID - Outbound Segmentation Interleaving Disable
	Segmentation interleaving allows the message manager to
	interleave segments from two or more transactions with the
	same destination device ID (regardless of type). This may
	increase performance for transmission but may also consume
	additional reassembly resources at the destination.

	A non-Freescale target device may not complete Type 9
	reassembly correctly when segmentation interleaving is
	performed on two PDUs with the same flow but different CoS.
	Workaround: disable segmentation interleaving by setting
	<osid value="yes">
	-->
	<osid value="no"/>
	<efq value="yes"/>
	<bpid type="Data-streaming" value="11"/>
	<bpid type="Doorbell" value="10"/>
	<bpid type="Mailbox" value="11"/>
	<sgbpid value="12"/>
</rman_cfg>

fq_bit是做什么的呢，

//build_t2080rdb-64b\tmp\work\t2080rdb_64b-fsl-linux\usdpaa\git-r4\git\src\rman\rman_driver.c line181
int rman_dev_config(struct rman_dev *rmdev, const struct rman_cfg *cfg)
{
	uint32_t mmmr;

	if (!rmdev || !rmdev->global_regs || !cfg)
		return -EINVAL;

	mmmr = read_reg(&rmdev->global_regs->mmmr);
	/* Set inbound message descriptor write status */
	mmmr &= ~(1 << RMAN_MMMR_MDD_SHIFT);
	mmmr |= cfg->md_create << RMAN_MMMR_MDD_SHIFT;
	/* Set OSID */
	mmmr &= ~(1 << RMAN_MMMR_OSID_SHIFT);
	mmmr |= cfg->osid << RMAN_MMMR_OSID_SHIFT;
	/* Set EFQ */
	mmmr &= ~(1 << RMAN_MMMR_EFQ_SHIFT);
	mmmr |= cfg->efq << RMAN_MMMR_EFQ_SHIFT;
	write_reg(&rmdev->global_regs->mmmr, mmmr);

	/* Initialize the frame queue assembly register */
	/* Data streaming supports max 32 inbound frame queues */
	write_reg(&rmdev->global_regs->mmt9fqar,
		  cfg->fq_bits[RIO_TYPE9] << RMAN_FQAR_STID_SHIFT);
	/* Doorbell supports max 1 inbound frame queues */
	write_reg(&rmdev->global_regs->mmt10fqar, 0);
	/* Mailbox supports max 4 inbound frame queues */
	write_reg(&rmdev->global_regs->mmt11fqar,
		  cfg->fq_bits[RIO_TYPE11] << RMAN_FQAR_LTR_SHIFT);

	return 0;
}

FRA只支持SRIO TYPE 8~11四种类型，

//build_t2080rdb-64b\tmp\work\t2080rdb_64b-fsl-linux\usdpaa\git-r4\git\include\usdpaa\fsl_rman_ib.h line37
enum RIO_TYPE {
	RIO_TYPE0 = 0,
	RIO_TYPE1,
	RIO_TYPE2,
	RIO_TYPE3,
	RIO_TYPE4,
	RIO_TYPE5,
	RIO_TYPE6,
	RIO_TYPE7,
	RIO_TYPE8,
	RIO_TYPE9,
	RIO_TYPE10,
	RIO_TYPE11,
	RIO_TYPE_NUM,
	RIO_TYPE_PW = RIO_TYPE8,
	RIO_TYPE_DSTR = RIO_TYPE9,
	RIO_TYPE_DBELL = RIO_TYPE10,
	RIO_TYPE_MBOX = RIO_TYPE11
};
//build_t2080rdb-64b\tmp\work\t2080rdb_64b-fsl-linux\usdpaa-apps\git-r0\git\src\fra\lib\fra_cfg_parser\fra_cfg_parser.c line267
static int parse_tran(xmlNodePtr tran_node, struct list_head *list)
{
	char *name;
	char *type;
	xmlNodePtr tranp;
	struct rio_tran *tran;

	if (!tran_node)
		return -EINVAL;

	name = get_attributes(tran_node, BAD_CAST TRAN_NAME);
	search_member(tran, name, list);
	if (!tran) {
		tran = malloc(sizeof(*tran));
		if (!tran)
			return -ENOMEM;
		memset(tran, 0, sizeof(*tran));
		snprintf(tran->name, sizeof(tran->name), "%s",  name);
		type = get_attributes(tran_node, BAD_CAST TRAN_TYPE);
		tran->type = rio_type_str_to_idx(type);
		list_add_tail(&tran->node, list);
	}

	/* Update tran configuration */
	tranp = tran_node->xmlChildrenNode;
	switch (tran->type) {
	case RIO_TYPE_DBELL:
	case RIO_TYPE_PW:
		for_all_sibling_nodes(tranp) {
			if ((is_node(tranp, BAD_CAST TRAN_FLOWLVL_NODE))) {
				tran_parse_element(tranp, tran->flowlvl,
					tran->flowlvl_mask);
			}
		}
		break;
	case RIO_TYPE_MBOX:
		for_all_sibling_nodes(tranp) {
			if ((is_node(tranp, BAD_CAST TRAN_FLOWLVL_NODE)))
				tran_parse_element(tranp, tran->flowlvl,
						tran->flowlvl_mask);
			else if ((is_node(tranp, BAD_CAST TRAN_MBOX_NODE)))
				tran_parse_element(tranp, tran->mbox.mbox,
						tran->mbox.mbox_mask);
			else if ((is_node(tranp, BAD_CAST TRAN_LTR_NODE)))
				tran_parse_element(tranp, tran->mbox.ltr,
						tran->mbox.ltr_mask);
			else if ((is_node(tranp, BAD_CAST TRAN_MSGLEN_NODE)))
				tran_parse_element(tranp, tran->mbox.msglen,
						tran->mbox.msglen_mask);
		}
		break;
	case RIO_TYPE_DSTR:
		for_all_sibling_nodes(tranp) {
			if ((is_node(tranp, BAD_CAST TRAN_FLOWLVL_NODE)))
				tran_parse_element(tranp, tran->flowlvl,
					tran->flowlvl_mask);
			else if ((is_node(tranp, BAD_CAST TRAN_COS_NODE)))
				tran_parse_element(tranp, tran->dstr.cos,
					tran->dstr.cos_mask);
			else if ((is_node(tranp, BAD_CAST TRAN_STREAMID_NODE)))
				tran_parse_element(tranp,
					tran->dstr.streamid,
					tran->dstr.streamid_mask);
		}
		break;
	default:
		error(0, 0, "transaction %s has an invalid type %s",
		      tran->name, RIO_TYPE_TO_STR[tran->type]);
		return -ENXIO;
	}
	return 0;
}

FRA配置文件里有两个Mask<flowlvl value="5" mask="1"/>和<sid value="0x11" mask="0xff"/>，这需要查看ibcu(Inbound Block Classification Unit)寄存器，
131
函数rman_config_ibcu使用了上面的两个Mask，参考T2080DPAARM，可以看到这两个Mask都是对接收的包进行过滤分类用的，

int rman_config_ibcu(struct rman_inbound_block *ib,
			  const struct ibcu_cfg *cfg)
{
	int cu_index = cfg->ibcu;

	if (ib->cu[cu_index].status != IBCU_STATUS_READY) {
		error(0, EINVAL, "RMan: please firstly request an ibcu");
		return -EINVAL;
	}

	write_reg(&ib->cu[cu_index].cu_regs->fqr, cfg->fqid);
	write_reg(&ib->cu[cu_index].cu_regs->rvr[0],
		  cfg->sid << 16 | cfg->did);
	write_reg(&ib->cu[cu_index].cu_regs->rmr[0],
		  cfg->sid_mask << 16 | cfg->did_mask);
	switch (cfg->tran->type) {
	case RIO_TYPE_DBELL:
	case RIO_TYPE_PW:
		write_reg(&ib->cu[cu_index].cu_regs->rvr[1],
			  cfg->tran->flowlvl << 28 |
			  cfg->port << 24);
		write_reg(&ib->cu[cu_index].cu_regs->rmr[1],
			  cfg->tran->flowlvl_mask << 28 |
			  cfg->port_mask << 24);
		write_reg(&ib->cu[cu_index].cu_regs->dbpr,
			  (cfg->msgsize << 16) | cfg->bpid);
		write_reg(&ib->cu[cu_index].cu_regs->dor,
			  cfg->data_offset);
		break;
	case RIO_TYPE_MBOX:
		write_reg(&ib->cu[cu_index].cu_regs->rvr[1],
			  cfg->tran->flowlvl << 28 |
			  cfg->port << 24 |
			  cfg->tran->mbox.msglen << 8 |
			  cfg->tran->mbox.ltr << 6 |
			  cfg->tran->mbox.mbox);
		write_reg(&ib->cu[cu_index].cu_regs->rmr[1],
			  cfg->tran->flowlvl_mask << 28 |
			  cfg->port_mask << 24 |
			  cfg->tran->mbox.msglen_mask << 8 |
			  cfg->tran->mbox.ltr_mask << 6 |
			  cfg->tran->mbox.mbox_mask);
		write_reg(&ib->cu[cu_index].cu_regs->dbpr,
			  (cfg->msgsize << 16) | cfg->bpid);
		write_reg(&ib->cu[cu_index].cu_regs->dor,
			  cfg->data_offset);
		break;
	case RIO_TYPE_DSTR:
		write_reg(&ib->cu[cu_index].cu_regs->rvr[1],
			  cfg->tran->flowlvl << 28 |
			  cfg->port << 24 |
			  cfg->tran->dstr.cos << 16 |
			  cfg->tran->dstr.streamid);
		write_reg(&ib->cu[cu_index].cu_regs->rmr[1],
			  cfg->tran->flowlvl_mask << 28 |
			  cfg->port_mask << 24 |
			  cfg->tran->dstr.cos_mask << 16 |
			  cfg->tran->dstr.streamid_mask);
		write_reg(&ib->cu[cu_index].cu_regs->t9fcdr,
			  cfg->fcdr << 16 |
			  cfg->fcdr);
		write_reg(&ib->cu[cu_index].cu_regs->dbpr,
			  (cfg->msgsize << 16) | cfg->bpid);
		write_reg(&ib->cu[cu_index].cu_regs->t9sgbpr,
			  (cfg->sgsize << 16) | cfg->sgbpid);
		write_reg(&ib->cu[cu_index].cu_regs->dor,
			  cfg->data_offset);
		break;
	default:
		return -EINVAL;
	}
	write_reg(&ib->cu[cu_index].cu_regs->mr,
		  cfg->fq_mode << 28 |
		  cfg->tran->type << 24 |
		  cfg->ext << 23 |
		  cfg->cgn);

	return 0;
}

测试

root@t2080rdb:~# fra
Found /fsl,dpaa/ethernet@0, Tx Channel = 802, FMAN = 0, Port ID = 1
Found /fsl,dpaa/ethernet@1, Tx Channel = 803, FMAN = 0, Port ID = 2
Found /fsl,dpaa/ethernet@2, Tx Channel = 804, FMAN = 0, Port ID = 3
Found /fsl,dpaa/ethernet@3, Tx Channel = 805, FMAN = 0, Port ID = 4
Found /fsl,dpaa/ethernet@8, Tx Channel = 800, FMAN = 0, Port ID = 9
Found /fsl,dpaa/ethernet@9, Tx Channel = 801, FMAN = 0, Port ID = a
QMan: Allocated lookup table at 0x3fff9409f010, entry count 32769
Configuring for 2 network interfaces
BPOOL: Release 8192 bufs to BPID 9
BPOOL: Release 256 bufs to BPID 10
BPOOL: Release 8192 bufs to BPID 11
BPOOL: Release 8192 bufs to BPID 12
Port 1 is not ready.
Try to restart connection...
fra: fsl_srio_connection(): Input/output error
fra: SRIO port0 is not connected
Port 1 is not ready.
Try to restart connection...
fra: fsl_srio_connection(): Input/output error
fra: SRIO port0 is not connected
Port 1 is not ready.
Try to restart connection...
fra: fsl_srio_connection(): Input/output error
fra: SRIO port0 is not connected
Port 1 is not ready.
Try to restart connection...
fra: fsl_srio_connection(): Input/output error
fra: SRIO port0 is not connected
Thread uid:0 alive (on cpu 1)
fra> q
Thread uid:0 killed (cpu 1)

修改设备树使用部分网口为usdpaa，或者请使用rman only模式，

<cfgdata>
        <config>
                <engine name="fm0">
                        <port type="MAC" number="1" policy="fm_policy_1"/>
                        <port type="MAC" number="2" policy="fm_policy_2"/>
                </engine>
        </config>
</cfgdata>

测试fra，

root@t2080rdb:~# fra -c config_srio.xml -p policy_ipv4.xml -f fra_config_mbox_processing1.xml 
Found /fsl,dpaa/ethernet@0, Tx Channel = 802, FMAN = 0, Port ID = 1
Found /fsl,dpaa/ethernet@1, Tx Channel = 803, FMAN = 0, Port ID = 2
QMan: Allocated lookup table at 0x3fffb244f010, entry count 32769
Configuring for 2 network interfaces
warn: drained 8192 bufs from BPID 9
BPOOL: Release 8192 bufs to BPID 9
warn: drained 256 bufs from BPID 10
BPOOL: Release 256 bufs to BPID 10
warn: drained 8192 bufs from BPID 11
BPOOL: Release 8192 bufs to BPID 11
warn: drained 8192 bufs from BPID 12
BPOOL: Release 8192 bufs to BPID 12
Port 1 is not ready.
Try to restart connection...
fra: fsl_srio_connection(): Input/output error
fra: SRIO port0 is not connected
Port 1 is not ready.
Try to restart connection...
fra: fsl_srio_connection(): Input/output error
fra: SRIO port0 is not connected
Port 1 is not ready.
Try to restart connection...
fra: fsl_srio_connection(): Input/output error
fra: SRIO port0 is not connected
Port 1 is not ready.
Try to restart connection...
fra: fsl_srio_connection(): Input/output error
fra: SRIO port0 is not connected
Thread uid:0 alive (on cpu 1)
fra>
三遍猪
关注
  • 0
    点赞
  • 踩
  • 7
    收藏
    觉得还不错? 一键收藏
  • 0
    评论
专栏目录
CodeWarrior IDE 调试 裸板指令 内部高级版
fafactx的专栏
03-19 995
CodeWarrior IDE 调试 裸板指令 内部高级版安装CodeWarrior IDE 并从官网或者代理购买license命令记录如下： 安装CodeWarrior IDE 并从官网或者代理购买license 运行ccs 命令记录如下： delete all findcc cwtaps findcc utaps config cc cwtap:ip_addr (config cc c...
vxWorks bsp t2080
09-25
fsl t2080 vxWorks6.9 板级支持包
NXP(Freescale) QorIQ T2080 SRIO使用
黑客三遍猪
03-25 2923
参考 A problem of sending SRIO doorbell, message by T2080 SDK SDK中没有T2080的例子，但是T2080 RapidIO类似于P3041DS/P4080DS/P5020DS/T4240QDS/B4860QDS开发板的RapidIO，代码是通用的。In the recent SDK, for the processors use RMA...
NXP(Freescale) QorIQ T2080启动流程分析
黑客三遍猪
02-20 2721
参考 ARM U-Boot SPL过程浅析 [uboot] （第二章）uboot流程——uboot-spl编译流程
T2080RDB: booting vxworks using uboot
嵌入式系统项目分享
04-12 754
T2080RDB: booting vxworks using uboot3162412793@qq.com技术交流QQ群：691976956i want to boot vxworks using uboot for t2080rdb board.i download image over tftp at 0x1000000gave bootvx 1000000=&gt; bootvx 1000...
T2080 SRIO DOORBELL例程
01-17
该工程是在NXP的yacto环境下编译运行的，需要安装交叉编译环境fsl-toolchain，主要是针对T2080的SRIO的消息处理机制USDPAA的RMAN方式，收发DOORBELL所用。
NXP(Freescale) QorIQ T2080-C290PCIE_DESIGN_FILES.zip
07-27
NXP的QorIQ T2080-C290PCIE是一款基于Power Architecture的高性能多核处理器系统级芯片(SoC)，专为网络、通信和数据中心应用设计。这款芯片集成了E500-v2微架构，提供强大的计算能力和高效的能源利用率。QorIQ T2080...
T2080 datasheet
12-05
freescale PowerPC T2080 datasheet.Freescale(现在NXP）公司的QorIQ 系列多核通信处理器。 采用28 nm工艺，4个1.8 GHz双线程e6500内核，具备更低的功耗和更高的性价比。
Freescale官方 QorIQ处理器T4240RDB 原理图（ORCAD+pdf）.rar
09-10
带有24个虚拟内核的T4240是QorIQ T系列的旗舰产品。该产品与T4160 (16个虚拟内核)及T4080 (8个虚拟内核)共同构成了T4系列。该系列可通过引脚兼容的封装提供高达3倍的性能可伸缩性。 这些产品的运行频率最高可达1.8 ...
Freescale官方 QorIQ处理器T1040RDB 原理图（ORCAD+pdf）.rar
09-10
QorIQ T1040四核和T1020双核通信处理器可支持两个或4个集成式64位e5500 Power Architecture®处理器内核，提供网络和通信所需的高性能数据通路加速架构(DPAA)和网络外设接口。 T1040和T1020是业界首款集成了千兆...
T2080参考设计
05-31
freescal的T2080芯片的参考设计，orcad格式。支持2个光口，4个电口，2个串口。
DPAA 说明文档.pdf
03-04
Data Path Acceleration Architecture (DPAA) Usage Scenarios
nxp的lsdk使用说明文档
12-15
LSDK is a complete Linux kit for NXP QorIQ ARM-based SoC's and the reference and evaluation boards that are available for them. It is a hybrid form of a Linux distribution because it combines the following major components to form a complete Linux system. • NXP firmware components including: • PPA, a resident EL3 privilege secure firmware for ARMv8A. • NXP peripheral firmware components for DPAA1, DPAA2, and PPFE. • NXP boot loaders. Two are offered: • U-Boot, based on denx.de plus patches. • UEFI, based on TianoCore. • NXP Linux kernel, based on kernel.org upstream plus patches. • NXP added user space components. • Ubuntu standard user space file set (user land), including compilers and cross compiler. The use of Ubuntu user land is what makes LSDK a hybrid. It is not entirely an Ubuntu distribution because it uses an NXP kernel, but it still uses Ubuntu user space files. This hybrid is possible because NXP ARM SoC's are standards-based so programs like bash and thousands of others run without being recompiled.
LS1043ADPAARM.pdf
03-04
QorIQ LS1043A Data Path Acceleration Architecture (DPAA) Reference Manual
NXP(Freescale) QorIQ T2080 SRIO SRA程序分析
黑客三遍猪
06-14 1153
SRA SRA初始化SRIO代码， for (i = 0; i < port_num; i++) if (fsl_srio_port_connected(sriodev) & (0x1 << i)) { fsl_srio_set_obwin(sriodev, i, 1, port_data[i].port_info.range_start, ...
windows下部署qor
pplin的专栏
04-25 2754
依赖环境1、git 2、mysql获取源码go get -u github.com/qor/qor-example golang的有些源码下载不了，需要手动下载。创建db表mysql -uroot -p mysql> CREATE DATABASE qor_example;运行qorcd $GOPATH/src/github.com/qor/qor-example go run main.g
NXP(Freescale) QorIQ T2080 DMA内存使用
黑客三遍猪
04-18 1373
参考 方法 usdpaa_mem的驱动位于drivers\staging\fsl_qbman\fsl_usdpaa.c，sdk2.0手册以下两个章节描述了DMA memory内存相关使用方法， 9.8.1.3.3 DMA memory management 9.8.2.6 USDPAA DMA API ...
DPAA FMAN FMC 工具使用
Jelmy的博客
02-08 1958
DPAA FMAN FMC 工具使用FMC 工具使用1 FMC 简介2 FMC 工具特性3 FMC工具组件和打包4 FMC工具 - Runtime Environment Mode功能快捷键合理的创建标题，有助于目录的生成如何改变文本的样式插入链接与图片如何插入一段漂亮的代码片生成一个适合你的列表创建一个表格设定内容居中、居左、居右SmartyPants创建一个自定义列表如何创建一个注脚注释也是必不可少的KaTeX数学公式新的甘特图功能，丰富你的文章UML 图表FLowchart流程图导出与导入导出导
Freescale QorIQ P4080：八核通信处理器
Freescale的QorIQ系列处理器，如P4080，注重创新，特别是在多核处理和数据路径优化方面。产品简介中可能详细阐述了这些创新，包括如何通过智能调度和负载平衡技术提高多核协同工作的效率，以及如何利用硬件加速器...
评论
添加红包

请填写红包祝福语或标题

个

红包个数最小为10个

元

红包金额最低5元

当前余额3.43元 前往充值 >
需支付：10.00元
成就一亿技术人!
领取后你会自动成为博主和红包主的粉丝 规则
hope_wisdom
发出的红包
实付元
使用余额支付
点击重新获取
扫码支付
钱包余额 0

抵扣说明：

1.余额是钱包充值的虚拟货币，按照1:1的比例进行支付金额的抵扣。
2.余额无法直接购买下载，可以购买VIP、付费专栏及课程。

余额充值