类似于需要排队的中断,仅次于ISR
eCos uses a split interrupt handling scheme where the interrupt processing is divided into two parts. The first part is the ISR, and the second part is the Deferred Service Routine (DSR). This scheme allows for the minimal amount of interrupt latency in the system by reducing the amount of time spent inside interrupt service routines. The idea is to keep the processing done in the ISR to a bare minimum. In this scheme, the DSR is executed with interrupts enabled, allowing other higher priority interrupts to occur and be processed in the midst of servicing a lower priority interrupt.
In some cases, where very little interrupt processing needs to be done, the interrupt can be handled in the ISR completely. If more complex servicing is required, a DSR should be used. The DSR is executed at a later time when thread scheduling is allowed. Executing the DSR at a later time allows the DSR to use kernel synchronization mechanisms; for example, to signal a thread, via a semaphore, that an interrupt has occurred. However, there are periods where thread scheduling is disabled by the kernel, although these periods are kept as small as possible. User threads can suspend scheduling as well. This prevents the DSR from executing. Preventing the DSR from executing in a timely manner can lead to system failures from an interrupt source overrunning. These issues should be kept in mind when designing the interrupt structure and how it interacts with the threads in the system.
In most cases, the DSR is executed immediately after the ISR completes. However, if a thread has locked the scheduler, the DSR is delayed until the thread unlocks it. The priority scheme is that ISRs have absolute priority over DSRs, and DSRs have absolute priority over threads.
eCos uses a split interrupt handling scheme where the interrupt processing is divided into two parts. The first part is the ISR, and the second part is the Deferred Service Routine (DSR). This scheme allows for the minimal amount of interrupt latency in the system by reducing the amount of time spent inside interrupt service routines. The idea is to keep the processing done in the ISR to a bare minimum. In this scheme, the DSR is executed with interrupts enabled, allowing other higher priority interrupts to occur and be processed in the midst of servicing a lower priority interrupt.
In some cases, where very little interrupt processing needs to be done, the interrupt can be handled in the ISR completely. If more complex servicing is required, a DSR should be used. The DSR is executed at a later time when thread scheduling is allowed. Executing the DSR at a later time allows the DSR to use kernel synchronization mechanisms; for example, to signal a thread, via a semaphore, that an interrupt has occurred. However, there are periods where thread scheduling is disabled by the kernel, although these periods are kept as small as possible. User threads can suspend scheduling as well. This prevents the DSR from executing. Preventing the DSR from executing in a timely manner can lead to system failures from an interrupt source overrunning. These issues should be kept in mind when designing the interrupt structure and how it interacts with the threads in the system.
In most cases, the DSR is executed immediately after the ISR completes. However, if a thread has locked the scheduler, the DSR is delayed until the thread unlocks it. The priority scheme is that ISRs have absolute priority over DSRs, and DSRs have absolute priority over threads.
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