-- Tool versions: ISE 12.3
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.std_logic_unsigned.all;
entity xxx-world is
port (
DATA: inout STD_LOGIC_VECTOR (7 downto 0 );
ADD: in STD_LOGIC_VECTOR (7 downto 0 );
WR: in STD_LOGIC;
RD: in STD_LOGIC;
CLK_4M: in STD_LOGIC;
MCLK: out STD_LOGIC;
SYNC_PD0:out STD_LOGIC;
SYNC_PD1:out STD_LOGIC;
CPLD_RST:in STD_LOGIC;
AD_CS0: out STD_LOGIC;
AD_CS1: out STD_LOGIC;
FSMC_NE3:in STD_LOGIC
);
end xxx-world;
architecture Behavioral of xxx-world is
constant PARAM_ADD0: std_logic_vector:="00000000"; --设备属性0-9对应的地址(ADDM)
constant PARAM_ADD1: std_logic_vector:="00000010";
constant PARAM_ADD2: std_logic_vector:="00000100";
constant PARAM_ADD3: std_logic_vector:="00000110";
constant PARAM_ADD4: std_logic_vector:="00001000";
constant PARAM_ADD5: std_logic_vector:="00001010";
constant PARAM_ADD6: std_logic_vector:="00001100";
constant PARAM_ADD7: std_logic_vector:="00001110";
constant PARAM_ADD8: std_logic_vector:="00010000";
constant PARAM_ADD9: std_logic_vector:="00010010";
constant PARAM_DATA0: std_logic_vector:="00001010"; --0x0c
constant PARAM_DATA1: std_logic_vector:="00000101"; --0x05
constant PARAM_DATA2: std_logic_vector:="00001001"; --0x09
constant PARAM_DATA3: std_logic_vector:="00001111"; --0x0f
constant PARAM_DATA4: std_logic_vector:="10100000";
constant PARAM_DATA5: std_logic_vector:="01010000";
constant PARAM_DATA6: std_logic_vector:="10000000";
constant PARAM_DATA7: std_logic_vector:="11100000";
constant PARAM_DATA8: std_logic_vector:="11110000";
constant PARAM_DATA9: std_logic_vector:="10101010";
signal RESET: std_logic;
signal S_MCLK: std_logic;
signal FRE_COUNT : std_logic_vector(19 downto 0);
signal MCLK_COUNT: std_logic_vector(19 downto 0);
signal SPI_EN: std_logic_vector(1 downto 0);
signal MCLK_START: std_logic;
signal PD_EN: std_logic_vector(1 downto 0);
-- signal S_AD_INT: std_logic;
-- signal INT_COUNT: std_logic_vector(3 downto 0);
begin
--/*******************************************************************/
--/*系统复位
--/*******************************************************************/
SystemReset_Process:
Process(WR,ADD)
begin
if WR='0' and ADD ="01000000" then
RESET <= DATA(0);
end if;
end process;
--/*******************************************************************/
--/*读系统属性 设备号
--/*******************************************************************/
SysParam_Process:
process(RD,ADD)
begin
if RD='0' and ADD= PARAM_ADD0 then
DATA <= PARAM_DATA0;
-- D_AL <= FRE_COUNT(7 downto 0);
elsif RD='0' and ADD= PARAM_ADD1 then
DATA <= PARAM_DATA1;
-- D_AL <= FRE_COUNT(15 downto 8);
elsif RD='0' and ADD= PARAM_ADD2 then
DATA <= PARAM_DATA2;
-- D_AL <= "0000"&FRE_COUNT(19 downto 16);
elsif RD='0' and ADD= PARAM_ADD3 then
DATA <= PARAM_DATA3;
elsif RD='0' and ADD= PARAM_ADD4 then
DATA <= PARAM_DATA4;
elsif RD='0' and ADD= PARAM_ADD5 then
DATA <= PARAM_DATA5;
elsif RD='0' and ADD= PARAM_ADD6 then
DATA <= PARAM_DATA6;
elsif RD='0' and ADD= PARAM_ADD7 then
DATA <= PARAM_DATA7;
elsif RD='0' and ADD= PARAM_ADD8 then
DATA <= PARAM_DATA8;
elsif RD='0' and ADD= PARAM_ADD9 then
DATA <= PARAM_DATA9;
else
DATA <= "ZZZZZZZZ";
end if;
end process;
--/*******************************************************************/
--/*Frequency Counter
--/*******************************************************************/
FreCount_Process:
-- process(RESET,WR,ADDH,ADDM,ADD_LATCH)
process(WR,ADD)
begin
-- if RESET='0' then
-- FRE_COUNT <= "00000000000000000000";
-- MCLK_START <= '0';
-- PD_EN <= "00";
-- els
if WR='0' and ADD="00100000" then --0X20
FRE_COUNT(7 downto 0) <= DATA;
elsif WR='0' and ADD="00100010" then --0X22
FRE_COUNT(15 downto 8) <= DATA;
elsif WR='0' and ADD="00100100" then --0X24
FRE_COUNT(19 downto 16) <= DATA(3 downto 0);
elsif WR='0' and ADD="00101010" then --0X2A
MCLK_START <= DATA(0);
elsif WR='0' and ADD="00111010" then --0X3A
PD_EN <= DATA(1 downto 0);
end if;
end process;
MCLK_Process:
process(CLK_4M,MCLK_START)
begin
if MCLK_START = '0' then
MCLK_COUNT <= "00000000000000000000";
-- S_MCLK <= '0';
elsif rising_edge(CLK_4M) then
if MCLK_COUNT = FRE_COUNT then
MCLK_COUNT <= "00000000000000000000";
-- S_MCLK <= not S_MCLK;
else
MCLK_COUNT <= MCLK_COUNT + '1';
end if;
if MCLK_COUNT <= ('0'& FRE_COUNT(19 downto 1) ) then
S_MCLK <= '1';
else
S_MCLK <= '0';
end if;
end if;
MCLK <= S_MCLK;
end process;
--/*******************************************************************/
--/*SYNC PD
--/*******************************************************************/
PD_Process:
process(PD_EN)
begin
if PD_EN = "01" then
SYNC_PD0 <= '1'; --high power on
SYNC_PD1 <= '0';
elsif PD_EN = "10" then
SYNC_PD0 <= '0';
SYNC_PD1 <= '1';
elsif PD_EN = "11" then
SYNC_PD0 <= '1';
SYNC_PD1 <= '1';
elsif PD_EN = "00" then
SYNC_PD0 <= '0';
SYNC_PD1 <= '0';
end if;
end process;
--/*******************************************************************/
--/*SPI Select
--/*******************************************************************/
SPI_Process:
process(RESET,WR,ADD)
begin
if RESET = '0' then
SPI_EN <= "00";
elsif WR='0' and ADD="00110000" then --0x30
SPI_EN <= DATA(1 downto 0);
end if;
if SPI_EN = "01" then
AD_CS0 <='0'; --low select
AD_CS1 <='1';
elsif SPI_EN = "10" then
AD_CS0 <='1';
AD_CS1 <='0';
elsif SPI_EN = "11" then
AD_CS0 <='1';
AD_CS1 <='1';
else
AD_CS0 <='1';
AD_CS1 <='1';
end if;
end process;
end Behavioral;
PS: 此代码没有判断片选信号。如此时STM32有扩展其它类型SRAM,会产生什么样的后果呢?