DSP5509A——SDRAM操作代码分析

最新推荐文章于 2022-12-10 00:12:42 发布

王纯配

最新推荐文章于 2022-12-10 00:12:42 发布

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这是我第一次写博客也是刚刚接触DSP，就先重建以及重复了SDRAM的工程并且分析SDRAM的整个代码，用来熟悉整个开发环境和了解DSP代码的编写以及相关datasheet的阅读，我觉得这是学习新的开发平台的一种比较快速的方式，创建工程，熟悉语法，datasheet阅读整个流程通过一个小小的例程就基本熟悉了。

不多说先放代码：

<span style="font-size:18px;"><span style="font-size:14px;">#include <csl.h>
#include <csl_pll.h>
#include <csl_emif.h>
#include <csl_chip.h>
#include <stdio.h>

Uint16 x;
Uint32 y;
CSLBool b;
unsigned int datacount = 0;
int databuffer[1000] ={0};
int *souraddr,*deminaddr;
/*锁相环的设置*/
PLL_Config  myConfig      = {
  0,    //IAI: the PLL locks using the same process that was underway 
                //before the idle mode was entered
  1,    //IOB: If the PLL indicates a break in the phase lock, 
                //it switches to its bypass mode and restarts the PLL phase-locking 
                //sequence
  20,    //PLL multiply value; multiply 20 times
  1             //Divide by 2 PLL divide value; it can be either PLL divide value 
                //(when PLL is enabled), or Bypass-mode divide value
                //(PLL in bypass mode, if PLL multiply value is set to 1)
};
/*SDRAM的EMIF设置*/
EMIF_Config emiffig = {
  0x0021, 	//EGCR  : the MEMFREQ = 00,the clock for the memory is equal to cpu frequence
  			//		  the WPE = 0 ,forbiden the writing posting when we debug the EMIF
  			//        the MEMCEN = 1,the memory clock is reflected on the CLKMEM pin
  			//        the NOHOLD = 1,HOLD requests are not recognized by the EMIF 
  0xFFFF,	//EMI_RST: any write to this register resets the EMIF state machine
  0x3FFF,	//CE0_1:  CE0 space control register 1
  			//        MTYPE = 011,Synchronous DRAM(SDRAM),16-bit data bus width
  0xFFFF,   //CE0_2:  CE0 space control register 2
  0x00FF,   //CE0_3:  CE0 space control register 3
  			//        TIMEOUT = 0xFF;
  0x7FFF,	//CE1_1:  CE0 space control register 1
  0xFFFF,	//CE1_2:  CE0 space control register 2
  0x00FF,	//CE1_3:  CE0 space control register 3
  
  0x7FFF,	//CE2_1:  CE0 space control register 1
  0xFFFF,	//CE2_2:  CE0 space control register 2
  0x00FF,	//CE2_3:  CE0 space control register 3
  
  0x7FFF,	//CE3_1:  CE0 space control register 1
  0xFFFF,	//CE3_2:  CE0 space control register 2
  0x00FF,	//CE3_3:  CE0 space control register 3
  
  0x2922,   //SDC1:   SDRAM control register 1
  			//		  TRC = 8 	
  			//        SDSIZE = 0;SDWID = 0
  			//        RFEN = 1
  			//        TRCD = 2
  			//        TRP  = 2
  0x0410,	//SDPER : SDRAM period register
  			//		  7ns *4096
  0x07FF,    //SDINIT: SDRAM initialization register
  			//        any write to this register to init the all CE spaces,
  			//        do it after hardware reset or power up the C55x device
  0x0131	//SDC2:	  SDRAM control register 2
  			//        SDACC = 0;
  			//        TMRD = 01;
  			//        TRAS = 0101;
  			//        TACTV2ACTV = 0001;								
  };


main()
{
	unsigned int error=0;
	/*初始化CSL库*/	
    CSL_init();
    
    /*EMIF为全EMIF接口*/
    CHIP_RSET(XBSR,0x0a01);
    
    /*设置系统的运行速度为120MHz*/
    PLL_config(&myConfig);
    
    /*初始化DSP的外部SDRAM*/
    EMIF_config(&emiffig);
    /*向SDRAM中写入数据*/

    souraddr =  (int *)0x40000;
    deminaddr = (int *)0x41000;
    while(souraddr<deminaddr)
    {
    	*souraddr++ = datacount;	
    	datacount++	;
    }
    /*读出SDRAM中的数据*/
    souraddr =  (int *)0x40000;
    datacount = 0;
    while(souraddr<deminaddr)
    {
    	databuffer[datacount++] = *souraddr++;
		if(databuffer[datacount-1]!=(datacount-1))
			error++;
    }

    while(1);
}
/*************************</span></span>

下面分部分分析：

锁相环的设置：PLL_Config结构体是在csl_pllA.H中定义的

PLL锁相环的配置寄存器Clock Mode Register (CLKMD)的各位的详细描述在5509A的datasheet里是没有的，

在overview_spru317f.pdf里有详细介绍，想要的发评论留下方式我发给你。

IAI：Initialize after idle bit.IAI=0表示The PLL locks using the same process that was underwaybefore the idle

mode was entered。

翻译过来大致就是在进入空闲模式之前PLL lock使用相同的方式。

IOB:Initialize on break bit. IOB=1:时钟发生器选择它的旁路模式并且重启锁相序列。

PLL MULT:pll倍频位。pllmult=20，输入时钟频率倍频20倍

PLL DIV:PLL分频位。plldiv=1，输入频率分频2

我的开发板外接频率是12MHZ，倍频20，再分频2以后系统时钟频率就是12*20/2=120MHZ。

SDRMA的EMIF设置：