Android on OMAP


Android on OMAP

This page collects information about and guides you through the installation of Google's Android on TI's ARM based OMAP SoCs.

Note: Only small parts of this page should be TI OMAP specific. The basic tasks should also apply to all other ARM926 or higher based SoCs at least able to run a 2.6.23 Linux kernel.

Note: If you like this page, please see the Android Portal on this site for much more information about Android systems programming. See Android Porting for more links to porting information, articles and tutorials.

Note: This article assumes that your are familiar with some basics of embedded ARM Linux. E.g. you should know how to use diff & patch, how to boot your embedded ARM SoC with a recent non-Android Linux, how to use a cross compiler etc.



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The OMAP36xx high-performance, multimedia application device is based on the enhanced OMAP™ 3 architecture and is integrated on TI advanced 45-nm process technology. The architecture is designed to provide best-in-class video, image, and graphics processing sufficient to support the following: • Streaming video • 2-dimension/3-dimension (2D/3D) mobile gaming • Video conferencing • High-resolution still image • Video capture in 2.5G wireless terminals, 3G wireless terminals, rich multimedia-featured handsets, and high-performance personal digital assistants (PDAs) The device supports high-level operating systems (OSs) such as: • Android™ OS • Linux® • Symbian OS™ • Windows® CE This OMAP device includes state-of-the-art power-management techniques required for high-performance mobile products. The following subsystems are part of the device: • Microprocessor unit (MPU) subsystem based on the ARM Cortex™-A8 microprocessor • Imaging video and audio (IVA2.2) subsystem with a TMS320C64x™ digital signal processor (DSP) core • POWERVR® SGX530 subsystem for 2D and 3D graphics acceleration to support display and gaming effects • Camera image signal processor (ISP2P) that supports multiple formats and interfacing options to a wide variety of image sensors • Display subsystem with a wide variety of features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC/PAL video out. • Level 3 (L3) and level 4 (L4) interconnects that provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals The device also offers: • A comprehensive power and clock-management scheme that enables high-performance, low-power operation, and ultralow-power standby features. The device also supports SmartReflex™ adaptative voltage control. This power-management technique for automatic control of the operating voltage of a module reduces the active power consumption. • Connectivity to various cellular modem chipset • Memory stacking feature using the package-on-package (POP) implementation (see Section 1.4, Package-on-Package Concept)
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