module top_module (
input clk,
input reset,
input [3:1] s,
output fr3,
output fr2,
output fr1,
output dfr
);
reg [2:0]state,next_state;
parameter S0=1, S1u=2, S1d=3, S2u=4, S2d=5, S3=6;
always@(posedge clk) begin
if(reset) state <= S0;
else state <= next_state;
end
always @(*) begin
case(state)
S0:
if(s == {3'b001}) next_state <= S1u;
else if(s == {3'b000}) next_state <= S0;
S1u:
if(s == {3'b000}) next_state <= S0;
else if(s == {3'b011}) next_state <= S2u;
else if(s == {3'b001}) next_state <= S1u;
S2u:
if(s == {3'b001}) next_state <= S1d;
else if(s == {3'b011}) next_state <= S2u;
else if(s == {3'b111}) next_state <= S3;
S1d:
if(s == {3'b000}) next_state <= S0;
else if(s == {3'b011}) next_state <= S2u;
else if(s == {3'b001}) next_state <= S1d;
S2d:
if(s == {3'b001}) next_state <= S1d;
else if(s == {3'b111}) next_state <= S3;
else if(s == {3'b011}) next_state <= S2d;
S3:
if(s == {3'b011}) next_state <= S2d;
else if(s == {3'b111}) next_state <= S3;
endcase
end
always@(*) begin
case(state)
S0:{dfr,fr3,fr2,fr1}=4'b1111;
S1u:{dfr,fr3,fr2,fr1}=4'b0011;
S2u:{dfr,fr3,fr2,fr1}=4'b0001;
S1d:{dfr,fr3,fr2,fr1}=4'b1011;
S2d:{dfr,fr3,fr2,fr1}=4'b1001;
S3:{dfr,fr3,fr2,fr1}=4'b0000;
endcase
end
endmodule
状态机如图所示:
图中,状态含义如下:
S0:水位低于s1
S1u:水位从s1下上升到高于s1
S2u:水位从s2下上升到高于s2
S1d:水位从s2上下降到低于s2
S2d:水位从s3上下降到低于s3
S3:水位从低于s3上升到高s3
(s1, s2, s3为输入,即水位传感器)
箭头上方s=xxx表示输入,最左边表示为最低位