module Branch_Zero(
input wire Branch,
input wire rst,
input wire Zero,
output reg dst
);
always @(*) begin
if (rst==1'b1) begin
dst <= 1'b0;
end else begin
if (Branch==1'b1 && Zero==1'b1) begin
dst <= 1'b1;
end else begin
dst <= 1'b0;
end
end
end
endmodule
cpu之Branch_Zero
最新推荐文章于 2024-09-07 10:29:16 发布