module PCBranch(
input wire[31:0] src1,
input wire[31:0] src2,
output wire[31:0] dst
);
assign dst=(src1<<2)+src2;
endmodule
cpu之PCBranch
最新推荐文章于 2023-03-28 21:39:12 发布
module PCBranch(
input wire[31:0] src1,
input wire[31:0] src2,
output wire[31:0] dst
);
assign dst=(src1<<2)+src2;
endmodule