UART(Universal Asynchronous Receiver/Transmitter)

uart驱动实现

操作系统:裸机
IP版本:DW_apb_uart
语言:C语言
机器:32位

register

uart基地址

#define UART_BASE (0x????????)

uart中断号

#define UART_IRQ (0x??)

uart寄存器结构体

#define   __I     volatile const /*Defines 'read only' */
#define   __O     volatile /*Defines 'write only' */
#define   __IO    volatile/*Defines 'read / write' */

typedef unsigned int			u32_t;

typedef struct
{
    union UART_REG0{
        __I  u32_t UART_RBR;        //0x00
        __O  u32_t UART_THR;        //0x00
        __IO u32_t UART_DLL;        //0x00
    } uart_reg0;

    union UART_REG1{
        __IO u32_t UART_IER;        //0x04
        __IO u32_t UART_DLH;        //0x04
    } uart_reg1;

    union UART_REG2{
        __I  u32_t UART_IIR;        //0x08
        __O  u32_t UART_FCR;        //0x08
    } uart_reg2;

    __IO u32_t UART_LCR;            //0x0C
    __IO u32_t UART_MCR;            //0x10
    __I  u32_t UART_LSR;            //0x14
    __I  u32_t UART_MSR;            //0x18

    __IO u32_t UART_SCR;            //0x1C
    __IO u32_t UART_LPDLL;          //0x20
    __IO u32_t UART_LPDLH;          //0x24

    u32_t RSVD0[2];            //0x28~0x2C

    union UART_REG3{
        struct UART_SRBR {
            __I  u32_t UART_SRBR0;      //0x30
            __I  u32_t UART_SRBR1;      //0x34
            __I  u32_t UART_SRBR2;      //0x38
            __I  u32_t UART_SRBR3;      //0x3C
            __I  u32_t UART_SRBR4;      //0x40
            __I  u32_t UART_SRBR5;      //0x44
            __I  u32_t UART_SRBR6;      //0x48
            __I  u32_t UART_SRBR7;      //0x4C
            __I  u32_t UART_SRBR8;      //0x50
            __I  u32_t UART_SRBR9;      //0x54
            __I  u32_t UART_SRBR10;     //0x58
            __I  u32_t UART_SRBR11;     //0x5C
            __I  u32_t UART_SRBR12;     //0x60
            __I  u32_t UART_SRBR13;     //0x64
            __I  u32_t UART_SRBR14;     //0x68
            __I  u32_t UART_SRBR15;     //0x6C
        } uart_srbr;

        struct UART_STHR {
            __O  u32_t UART_STHR0;      //0x30
            __O  u32_t UART_STHR1;      //0x34
            __O  u32_t UART_STHR2;      //0x38
            __O  u32_t UART_STHR3;      //0x3C
            __O  u32_t UART_STHR4;      //0x40
            __O  u32_t UART_STHR5;      //0x44
            __O  u32_t UART_STHR6;      //0x48
            __O  u32_t UART_STHR7;      //0x4C
            __O  u32_t UART_STHR8;      //0x50
            __O  u32_t UART_STHR9;      //0x54
            __O  u32_t UART_STHR10;     //0x58
            __O  u32_t UART_STHR11;     //0x5C
            __O  u32_t UART_STHR12;     //0x60
            __O  u32_t UART_STHR13;     //0x64
            __O  u32_t UART_STHR14;     //0x68
            __O  u32_t UART_STHR15;     //0x6C
        } uart_sthr;
    } uart_reg3;

    __IO u32_t UART_FAR;         //0x70
    __I  u32_t UART_TFR;         //0x74
    __O  u32_t UART_RFW;         //0x78
    __I  u32_t UART_USR;         //0x7C

    __I  u32_t UART_TFL;         //0x80
    __I  u32_t UART_RFL;         //0x84
    __IO u32_t UART_SRR;         //0x88
    __IO u32_t UART_SRTS;        //0x8C

    __IO u32_t UART_SBCR;        //0x90
    __IO u32_t UART_SDMAM;       //0x94
    __IO u32_t UART_SFE;         //0x98
    __IO u32_t UART_SRT;         //0x9C

    __IO u32_t UART_STET;        //0xA0
    __IO u32_t UART_HTX;         //0xA4
    __IO u32_t UART_DMASA;       //0xA8
    __IO u32_t UART_TCR;         //0xAC

    __IO u32_t UART_DE_EN;       //0xB0
    __IO u32_t UART_RE_EN;       //0xB4
    __IO u32_t UART_DET;         //0xB8
    __IO u32_t UART_TAT;         //0xBC

    __IO u32_t UART_DLF;         //0xC0
    __IO u32_t UART_RAR;         //0xC4
    __IO u32_t UART_TAR;         //0xC8
    __IO u32_t UART_LCR_EXT;     //0xCC

    __IO u32_t UART_PROT_LEVEL;     //0xD0
    __IO u32_t UART_REG_TIMEOUT_RST;//0xD4

    u32_t RSVD1[7];         //0xD8~0xF0

    __I  u32_t UART_CPR;         //0xF4
    __I  u32_t UART_UCV;         //0xF8
    __I  u32_t UART_CTR;         //0xFC
}uart_typedef;
#define UART0    ((uart_typedef *)UART0_BASE)

include

数据位宽

#define UART_9BIT_DATA_EN 0

#ifdef UART_9BIT_DATA_EN
	#define UART_WIDTH_N 9
#else
	#define UART_WIDTH_N 8
#endif

用户自定义初始化结构体

typedef struct
{
    u32_t baudrate_fraction;
    u32_t baudrate_low;
    u32_t baudrate_high;

    /* 0x3:8bit    0x2:7bit    0x1:6bit    0x0:5bit*/
    u32_t data_length;

    /* 0x0:1 stop bit    0x1:1.5 stop bit when DLS(LCR[1:0]) is zero,else 2 stop bit */
    u32_t stop_bit_count;

    /* 0x0:odd     0x1:even */
    u32_t add_even;
}uart_inittypedef;

寄存器例化

typedef union uarts_rbr
{
    struct rbr {
        u32_t rbr:UART_WIDTH_N;
        u32_t rsvd:(32-UART_WIDTH_N);
    } rbr;
    u32_t value;
} uarts_rbr;

typedef union uarts_thr
{
    struct thr {
        u32_t thr:UART_WIDTH_N;
        u32_t rsvd:(32-UART_WIDTH_N);
    } thr;
    u32_t value;
} uarts_thr;

typedef union uarts_tcr
{
    struct tcr {
        u32_t rs485_en:1;
        u32_t re_pol:1;
        u32_t de_pol:1;
        u32_t xfer_mode:2;
        u32_t rsvd:27;
    } tcr;
    u32_t value;
} uarts_tcr;

typedef union uarts_mcr
{
    struct mcr {
        u32_t dtr:1;
        u32_t rts:1;
        u32_t out1:1;
        u32_t out2:1;
        u32_t loopback:1;
        u32_t afce:1;
        u32_t sire:1;
        u32_t rsvd:25;
    } mcr;
    u32_t value;
} uarts_mcr;

typedef union uarts_lcr
{
    struct lcr {
        u32_t dls:2;
        u32_t stop:1;
        u32_t pen:1;
        u32_t eps:1;
        u32_t sp:1;
        u32_t bc:1;
        u32_t dlab:1;
        u32_t rsvd:24;
    } lcr;
    u32_t value;
} uarts_lcr;

typedef union uarts_dlf
{
    struct dlf {
        u32_t dlf:UART_WIDTH_N;
        u32_t rsvd:(32-UART_WIDTH_N);
    } dlf;
    u32_t value;
} uarts_dlf;

typedef union uarts_dll
{
    struct dll {
        u32_t dll:8;
        u32_t rsvd:24;
    } dll;
    u32_t value;
} uarts_dll;

typedef union uarts_dlh
{
    struct dlh {
        u32_t dlh:8;
        u32_t rsvd:24;
    } dlh;
    u32_t value;
} uarts_dlh;

typedef union uarts_fcr
{
    struct fcr {
        u32_t fifoe:1;
        u32_t rfifor:1;
        u32_t xfifor:1;
        u32_t dmam:1;
        u32_t tet:2;
        u32_t rt:2;
        u32_t rsvd:24;
    } fcr;
    u32_t value;
} uarts_fcr;

typedef union uarts_ier
{
    struct ier {
        u32_t erbfi:1;
        u32_t etbei:1;
        u32_t elsi:1;
        u32_t edssi:1;
        u32_t elcolr:1;
        u32_t rsvd0:2;
        u32_t ptime:1;
        u32_t rsvd1:24;
    } ier;
    u32_t value;
} uarts_ier;

typedef union uarts_iir
{
    struct iir {
        u32_t iid:4;
        u32_t rsvd0:2;
        u32_t fifoe:2;
        u32_t rsvd1:24;
    } iir;
    u32_t value;
} uarts_iir;

typedef union uarts_lsr
{
    struct lsr {
        u32_t dr:1;
        u32_t oe:1;
        u32_t pe:1;
        u32_t fe:1;
        u32_t bi:1;
        u32_t thre:1;
        u32_t temt:1;
        u32_t rfe:1;
        u32_t addr_rcvd:1;
        u32_t rsvd:23;
    } lsr;
    u32_t value;
} uarts_lsr;

source

void uart_set_rs485_mode(uart_typedef* uart)
{
    uarts_tcr *uart_tcr;

    uart_tcr = (uarts_tcr *) & (uart->UART_TCR);
    /* enabled the timer:bit0写1 */
    uart_tcr->tcr.rs485_en = 0b1;
}

void uart_stop(uart_typedef* uart)
{
    uarts_mcr *uart_mcr;

    uart_mcr = (uarts_mcr *) & (uart->UART_MCR);
    uart_mcr->mcr.sire = 0b0;
    uart_mcr->mcr.afce = 0b0;
    uart_mcr->mcr.loopback = 0b0;
    uart_mcr->mcr.out2 = 0b0;
    uart_mcr->mcr.out1 = 0b0;
    uart_mcr->mcr.rts = 0b0;
    uart_mcr->mcr.dtr = 0b0;
}

void uart_enable_baudrate(uart_typedef* uart)
{
    uarts_lcr *uart_lcr;

    uart_lcr = (uarts_lcr *) & (uart->UART_LCR);
    uart_lcr->lcr.dlab = 0b1;
}

void uart_disable_baudrate(uart_typedef* uart)
{
    uarts_lcr *uart_lcr;

    uart_lcr = (uarts_lcr *) & (uart->UART_LCR);
    uart_lcr->lcr.dlab = 0b0;
}


void uart_set_baudrate_fraction(uart_typedef* uart, u32_t fraction)
{
    uarts_dlf *uart_dlf;

    uart_dlf = (uarts_dlf *) & (uart->UART_DLF);
    uart_dlf->dlf.dlf = fraction;
}

void uart_set_baudrate_low(uart_typedef* uart, u32_t low)
{
    uarts_dll *uart_dll;

    uart_dll = (uarts_dll *) & (uart->uart_reg0.UART_DLL);
    uart_dll->dll.dll = low;
}

void uart_set_baudrate_high(uart_typedef* uart, u32_t high)
{
    uarts_dlh *uart_dlh;

    uart_dlh = (uarts_dlh *) & (uart->UART_DLF);
    uart_dlh->dlh.dlh = high;
}

void uart_select_data_length(uart_typedef* uart, u32_t length)
{
    uarts_lcr *uart_lcr;

    uart_lcr = (uarts_lcr *) & (uart->UART_LCR);
    uart_lcr->lcr.dls = length;
}

void uart_select_stop_bit_count(uart_typedef* uart, u32_t stop_bit_count)
{
    uarts_lcr *uart_lcr;

    uart_lcr = (uarts_lcr *) & (uart->UART_LCR);
    uart_lcr->lcr.stop = stop_bit_count;
}

void uart_enable_parity(uart_typedef* uart)
{
    uarts_lcr *uart_lcr;

    uart_lcr = (uarts_lcr *) & (uart->UART_LCR);
    uart_lcr->lcr.pen = 0b1;
}

void uart_disable_parity(uart_typedef* uart)
{
    uarts_lcr *uart_lcr;

    uart_lcr = (uarts_lcr *) & (uart->UART_LCR);
    uart_lcr->lcr.pen = 0b0;
}

void uart_select_parity_odd_even(uart_typedef* uart, u32_t odd_even)
{
    uarts_lcr *uart_lcr;

    uart_lcr = (uarts_lcr *) & (uart->UART_LCR);
    uart_lcr->lcr.eps = odd_even;
}

void uart_enable_stick_parity(uart_typedef* uart)
{
    uarts_lcr *uart_lcr;

    uart_lcr = (uarts_lcr *) & (uart->UART_LCR);
    uart_lcr->lcr.sp = 0b1;
}

void uart_disable_stick_parity(uart_typedef* uart)
{
    uarts_lcr *uart_lcr;

    uart_lcr = (uarts_lcr *) & (uart->UART_LCR);
    uart_lcr->lcr.sp = 0b0;
}

void uart_enable_break_control(uart_typedef* uart)
{
    uarts_lcr *uart_lcr;

    uart_lcr = (uarts_lcr *) & (uart->UART_LCR);
    uart_lcr->lcr.bc = 0b1;
}

void uart_disable_break_control(uart_typedef* uart)
{
    uarts_lcr *uart_lcr;

    uart_lcr = (uarts_lcr *) & (uart->UART_LCR);
    uart_lcr->lcr.bc = 0b0;
}

void uart_enable_fifo(uart_typedef* uart)
{
    uarts_fcr *uart_fcr;

    uart_fcr = (uarts_fcr *) & (uart->uart_reg2.UART_FCR);
    uart_fcr->fcr.fifoe = 0b1;
}

void uart_disable_fifo(uart_typedef* uart)
{
    uarts_fcr *uart_fcr;

    uart_fcr = (uarts_fcr *) & (uart->uart_reg2.UART_FCR);
    uart_fcr->fcr.fifoe = 0b0;
}

void uart_reset_receive_fifo(uart_typedef* uart)
{
    uarts_fcr *uart_fcr;

    uart_fcr = (uarts_fcr *) & (uart->uart_reg2.UART_FCR);
    uart_fcr->fcr.rfifor = 0b1;
}

void uart_reset_transmit_fifo(uart_typedef* uart)
{
    uarts_fcr *uart_fcr;

    uart_fcr = (uarts_fcr *) & (uart->uart_reg2.UART_FCR);
    uart_fcr->fcr.xfifor = 0b1;
}

void uart_select_dma_mode0(uart_typedef* uart)
{
    uarts_fcr *uart_fcr;

    uart_fcr = (uarts_fcr *) & (uart->uart_reg2.UART_FCR);
    uart_fcr->fcr.dmam = 0b0;
}

void uart_select_dma_mode1(uart_typedef* uart)
{
    uarts_fcr *uart_fcr;

    uart_fcr = (uarts_fcr *) & (uart->uart_reg2.UART_FCR);
    uart_fcr->fcr.dmam = 0b1;
}

void uart_fifo_empty(uart_typedef* uart)
{
    uarts_fcr *uart_fcr;

    uart_fcr = (uarts_fcr *) & (uart->uart_reg2.UART_FCR);
    uart_fcr->fcr.tet = 0b00;
}

void uart_fifo_trigger_level(uart_typedef* uart, u32_t trogger_level)
{
    uarts_fcr *uart_fcr;

    uart_fcr = (uarts_fcr *) & (uart->uart_reg2.UART_FCR);
    uart_fcr->fcr.rt = trogger_level;
}

void uart_enable_interrupt(uart_typedef* uart)
{
    uarts_ier *uart_ier;

    uart_ier = (uarts_ier *) & (uart->uart_reg1.UART_IER);
    uart_ier->ier.erbfi = 0b1;
    uart_ier->ier.etbei = 0b1;
    uart_ier->ier.elsi= 0b1;
    uart_ier->ier.edssi = 0b1;
    uart_ier->ier.elcolr = 0b1;
    uart_ier->ier.ptime = 0b1;
}

void uart_tx_data(uart_typedef* uart, u32_t data)
{
    uarts_thr *uart_thr;

    uart_thr = (uarts_thr *) & (uart->uart_reg0.UART_THR);
    uart_thr->thr.thr = data;
}

u32_t uart_rx_data(uart_typedef* uart)
{
    uarts_rbr *uart_rbr;

    uart_rbr = (uarts_rbr *) & (uart->uart_reg0.UART_RBR);
    return uart_rbr->rbr.rbr;
}

int uart_transmitter_status(uart_typedef* uart)
{
    uarts_lsr *uart_lsr;

    uart_lsr = (uarts_lsr *) & (uart->UART_LSR);
    return uart_lsr->lsr.thre;
}

int uart_receive_status(uart_typedef* uart)
{
    uarts_lsr *uart_lsr;

    uart_lsr = (uarts_lsr *) & (uart->UART_LSR);
    return uart_lsr->lsr.dr;
}

int uart_interrupt_status(uart_typedef* uart)
{
    uarts_iir *uart_iir;

    uart_iir = (uarts_iir *) & (uart->uart_reg2.UART_IIR);
    return uart_iir->value;
}

uart初始化

void uart_init(uart_typedef* uart,uart_inittypedef* uart_initstruct)
{
    /* stop uart */
    uart_stop(uart);

    /*  set baudrate*/
    uart_enable_baudrate(uart);
    uart_set_baudrate_fraction(uart, uart_initstruct->baudrate_fraction);
    uart_set_baudrate_low(uart, uart_initstruct->baudrate_low);
    uart_set_baudrate_high(uart, uart_initstruct->baudrate_high);
    uart_disable_baudrate(uart);

    /* select data length */
    uart_select_data_length(uart, uart_initstruct->data_length);

    /* select stop bit count */
    uart_select_stop_bit_count(uart, uart_initstruct->stop_bit_count);

    /* enable parity */
    uart_enable_parity(uart);
    /* select parity for add or even */
    uart_select_parity_odd_even(uart, uart_initstruct->add_even);
    /* enable stick parity */
    uart_enable_stick_parity(uart);

    /* release data transmission */
    uart_disable_break_control(uart);

    /* enable fifo */
    uart_enable_fifo(uart);
    /* reset receive fifo */
    uart_reset_receive_fifo(uart);
    /* reset transmit fifo */
    uart_reset_transmit_fifo(uart);
    /* select dma mode0 */
    uart_select_dma_mode0(uart);
    /* clear tx fifo to empty */
    uart_fifo_empty(uart);
    /* select the trogger level in rx fifo */
    uart_fifo_trigger_level(uart, 0x1);

    /* enable interrupt */
    uart_enable_interrupt(uart);
}

谢谢!!!

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