Step into the world of ARM Server

What is ARM 

ARM, with the full name of 'Advanced RISC Machine', is a famous RISC processor  from Cambridge England. 

CISC vs. RISC 

complex instruction set computer:   X86 Intel AMD 

reduced instruction set computer:    ARM MIPS Power RISC-V 

The other diffidences with X86 are: no microcode, no hyper-threading. 

Why is ARM 

Simplified ISA, efficient, low cost 

Aws, "40% better on efficient cost"

Orcale, "provide penny instance" 

ARM Core architecture 

The ARM Core architecture has been developed to V9 today from V1 in 1985.  

 

Since Arm V7, ARM changed their product naming to Cortex, which has the following different types: 

• A: APllication 

• R: Real-time 

• M: Microcontroller 

• SC: SecureCore 

Its Instruction set Architecture: 

• AARCH64 

• AARCH32 

 

Arm architecture extension and features 

There is also a microarchitecture under the architecture, Arm will release a new microarchitecture each year basically. 

Armv8.1-A 

• Atomic memory access instructions (AArch64) 

• Limited Order regions (AArch64) 

• Increased Virtual Machine Identifier (VMID) size, and Virtualization Host Extensions (AArch64) 

• Privileged Access Never (PAN) (AArch32 and AArch64) 

Armv8.2-A 

• Support for 52-bit addresses (AArch64) 

• The ability for PEs to share Translation Lookaside Buffer (TLB) entries (AArch32 and AArch64) 

• FP16 data processing instructions (AArch32 and AArch64) 

• Statistical profiling (AArch64) 

• Reliability Availability Serviceability (RAS) support becomes mandatory (AArch32 and AArch64) 

Armv8.3-A 

• Pointer authentication (AArch64) 

• Nested virtualization (AArch64) 

• Advanced Single Instruction Multiple Data (SIMD) complex number support (AArch32 and AArch64) 

• Improved JavaScript data type conversion support (AArch32 and AArch64) 

• A change to the memory consistency model (AArch64) 

• ID mechanism support for larger system-visible caches (AArch32 and AArch64) 

Armv8.4-A 

• Secure virtualization (AArch64) 

• Nested virtualization enhancements (AArch64) 

• Small translation table support (AArch64) 

• Relaxed alignment restrictions (AArch32 and AArch64) 

• Memory Partitioning and Monitoring (MPAM) (AArch32 and AArch64) 

• Additional crypto support (AArch32 and AArch64) 

• Generic counter scaling (AArch32 and AArch64) 

• Instructions to accelerate SHA 

Armv8.5-A and Armv9.0-A 

• Memory Tagging (AArch64) 

• Branch Target Identification (AArch64) 

• Random Number Generator instructions (AArch64) 

• Cache Clean to Point of Deep Persistence (AArch64) 

Armv8.6-A and Armv9.1-A 

• General Matrix Multiply (GEMM) instructions (AArch64) 

• Fine grained traps for virtualization (AArch64) 

• High precision Generic Timer 

• Data Gathering Hint (AArch64) 

Armv8.7-A and Armv9.2-A 

• Enhanced support for PCIe hot plug (AArch64) 

• Atomic 64-byte load and stores to accelerators (AArch64) 

• Wait For Instruction (WFI) and Wait For Event (WFE) with timeout (AArch64) 

• Branch-Record recording (Armv9.2 only) 

Armv8.7-A and Armv9.3-A 

• Non-maskable interrupts (AArch64) 

• Instructions to optimize memcpy() and memset() style operations (AArch64) 

• Enhancements to PAC (AArch64) 

• Hinted conditional branches (AArch64) 

Armv9 

V9 is the latest generation, which is released in 2021, it is more focused on AI and Security, including features such as: 

• SVE2(Scalable Vector Extension) 

• CCA arm confidential compute architecture 

ARM Product 

ARM currently has two product line, Neoverse and Cortex. 

Neoverse focuses on cloud and edge computing while cortex on Mobile and Embedded. 

 

Cortex 

V8: 

Cortex-X1: performance over efficiency 

A78C: HPC  

A78: VR 

A77: Third generation HPC processor, 5G 

A76: Second generation HPC processor 

A75: HPC processor V8.2  DynamIQ 

A73 

V9: 

Cortex-X2 

Cortex-A710 big CPU 

Cortex-A510 little CPU 

Cortex-A310 

Neoverse  

Code name: 

• Ares 

• Perseus 

• Zeus 

• Poseidon 

Neoverse is a new platform which brought up in 2018, it has three different directions: 

V for maximum performance 

N for Scale out Performance 

E for efficient throughput 

 

Neoverse Platform 

N1: ARM V8.2 Ares 

Product based on N1: 

Givation 2 

Amperea Altra 

 

E1:  ARM V8.2 

V1: first SVE + V8.4 (Zeus) 

N2: SVE2 and MTE Perseus 

ARM License type 

 

CXC program 

In close collaboration with Arm engineering teams, program partners can shape a final CPU product to meet their specific market demands. 

 

Introducing the Arm Cortex-X Custom program - Architectures and Processors blog - Arm Community blogs - Arm Community

 

Because of its license policy, there are a lot of processors outside, far more than X86, this is also considered a disadvantage for customers. 

 

ARM Server processor Vendors 

Amazon Graviton 

Graviton1 

2018 Cortex A72 

Graviton 2 

2019 N1 

Graviton 3 

3 sockets per motherboard, DDR5 

AWS Graviton3 Hits GA with 3 Sockets Per Motherboard Designs

 

AMD Seattle A1100: killed 

 
 

Marvell thunderX 

                             Qcom arm server（Centriq） == > 

Broadcom(Vulcan)  ==>          Cavium(thunderX) ==>        Marvell (thunderX) 

 
 

thunderbird2  => thunderbiard3(cancelled) ==>thunderx4 

    V8.1                                                                     v9  

Ampere Computing 

Advanced Micro(X-Gene)     ==>  Ampere Computing 

                    Intel engineers  ==> 

 
 

Ampere Altra:  V8.2 

Parter: GIGABYTE 

 
 

  Altra==>Altra Max 

   80 ==> 128 

 
 

Ampere-1 V8.6-A 

5nm/PCIe Gen5/DDR5 
 

Ampere Roadmap Has Four Future Arm Server Chips

 
 

Oracle and Arm - Partners – Arm®

Nvidia 

1. Denver program(killed) 

2. Grace 

  Armv9  144 cores, dcc5 

More powerful solution: 

      1. Grace Hopper SuperChip 

            cpu + gpu  900 GB/S  == 7x PCIE5 

       2. Working with their Bluefield, to improvise Network and Block IO 

Fujitsu 

A64FX  V8.2 

Fujitsu supercomputer Fugaku 

HPE Apollo 

48 cores + V8.2 + SVE 

https://www.fujitsu.com/downloads/SUPER/a64fx/a64fx_datasheet_en.pdf

Apple 

M1 Pro/Max/Ultra 

M2 pro/max/Ultra 

M3 in 2023 

 
 

Cloud Vendors 

1. AWS 

AWS and Arm - Partners – Arm®

 

M6g M6gd 

T4g 

C6g C6gd C6gn 

R6g 

X2gd 

LM4gn ls4gn 

G5g 

2. Azure 

Ampere Altra 

3. Oracle 

Ampere Altra 

 

ARM Hypervisors 

Hardware Virtualization 

VHE 

 

 

EPT 《==》 Stage2 translation 

IOMMU 《==》 SMMU 

APICv 《==》GICv 
 

KVM: 

vCPUs  123==>512 

52bit physical memory 4PB(v5.14) 

64K page: disused in upstream 

 

QEMU： 

Firmware: UEFI 

Device: VIRTIO-GPU 

 

QEMU machine model 

virt generic virtual platform 

CPU 'host' for kvm only 
 

sbsa-ref 

Server Base System Architecture Reference board 
 

Reference: 

Arm Community

Amping Up The Arm Server Roadmap

Arm launches v9 architecture – Arm®

‘virt’ generic virtual platform (virt) — QEMU documentation

Arm Server Base System Architecture Reference board (sbsa-ref) — QEMU documentation