代码仓:https://codechina.csdn.net/fu851523125/rtos
https://codechina.csdn.net/fu851523125/rtos/-/tags/release_v0.2.0
总结下前面两个要点:
1. release secondary cores
参考hisi u-boot中go_cpu1
/*
* 0xe51ff004 = "ldr pc, [pc, #-4]"
* next addr value will be the real booting addr
*/
mov r0, #0
ldr r1, =0xe51ff004
str r1, [r0]
add r0, r0, #4
ldr r1, =SYS_MEM_BASE
str r1, [r0]
dsb
isb
cpu从0地址开始执行,因为要实现跳转执行自己的secondary代码(位置不固定),所以0地址处放一个跳转指令。机器码0xe51ff004对应ARM汇编ldr pc, [pc, #-4],由于ARM采用三级