SMMU地址空间
SMMU_BASE需要对齐到(PAGESIZE * NUMPAGE * 2)。
//上下两部分大小相等,都等于页大小*页数 SMMU_GLOBAL_SIZE = SMMU_CB_SIZE = (NUMPAGE × PAGESIZE) //SMMU_TOP计算 SMMU_TOP = SMMU_BASE + SMMU_GLOBAL_SIZE + SMMU_CB_SIZE − 1 //Global区Top计算 SMMU_GLOBAL_TOP = SMMU_BASE + SMMU_GLOBAL_SIZE − 1 //CB区Base基址计算 SMMU_CB_BASE = SMMU_BASE + SMMU_GLOBAL_SIZE. //第n个CB基址计算,意味着一个CB占一页 SMMU_CBn_BASE = SMMU_CB_BASE + (n × PAGESIZE) |
The global address space
其中大多数地址空间安全和非安全模式都可访问,部分只能安全模式访问。
全局地址空间布局:
SMMU_GR0_BASE = SMMU_BASE + (0 × PAGESIZE) SMMU_GR1_BASE = SMMU_BASE + (1 × PAGESIZE) SMMU_GID_BASE = SMMU_BASE + (2 × PAGESIZE) SMMU_PM_BASE = SMMU_BASE + (3 × PAGESIZE) SMMU_SSD_BASE = SMMU_BASE + (4 × PAGESIZE) |
The translation context bank address space
CB | OFFSET | SIZE |
CB0 | SMMU_CB_BASE + (0×PAGESIZE) | PAGESIZE |
CB1 | SMMU_CB_BASE + (1×PAGESIZE) | PAGESIZE |
CB2 | SMMU_CB_BASE + (2×PAGESIZE) | PAGESIZE |
…… | …… | …… |
CBn | SMMU_CB_BASE + (n×PAGESIZE) | PAGESIZE |
部分CB只供stage2使用,部分CB既可以供stage1也可以供stage2,还有部分是供secure模式下的stage1用。而只供stage2使用的CB位于从索引0开始的SMMU_IDR1.NUMS2CB个,其余的CB往后排。
全局地址空间0
SMMU_IDR0
SES, bit[31] | Security 和Non-Security支持情况 0:不支持;1:支持 |
S1TS, bit[30] | Stage 1 Translation Support 0:不支持;1:支持 |
S2TS, bit[29] | Stage 2 Translation Support 0:不支持;1:支持 |
NTS, bit[28] | Stage 1 followed by stage 2 translation支持情况 0:不支持;1:支持 |
SMS, bit[27] | Stream Match支持情况 0:支持Stream indexing;1:支持Stream Match |
ATOSNS, bit[26] | 地址翻译操作的支持情况(前提:S1TS=1) 0:支持;1:不支持 |
PTFS, bits[25:24] | AArch32翻译的支持情况 |
NUMIRPT[7:0], bits[23:16] | 上下文故障中断数(v1用) |
EXSMRGS, bit[15] | Extended Stream Matching extension支持情况 |
CTTW, bit[14] | 一致性翻译表支持情况 0:不支持;1:支持 |
BTM, bit[13] | TLB广播支持 0:不支持;1:支持 |
NUMSIDB[3:0], bits[12:9] | StreamID编码的bit位数(0~15) |
EXIDS, bit[8] | 扩展的StreamID支持 0:不支持扩展;1:支持,并且最大bit数增加到16 |
NUMSMRG[7:0], bits[7:0] | Stream Mapping Register Groups数量(0~128) |
SMMU_IDR1
PAGESIZE, bit[31] | SMMU页大小,0:4KB;1:64KB |
NUMPAGENDXB, bits[30:28] | 页索引数,指示全局地址空间占据的页数NUMPAGE=2^(NUMPAGENDXB+1) |
Bits[27:26] | Reserved |
HAFDBS, bits[25:24] | 硬件Access Flag和Dirty Bit管理的支持,同stage 1 SMMU_CBn_TCR2.{HA, HD} and stage 2 SMMU_CBn_TCR.{HA, HD} bits。 00:不支持硬件更新Access Flag和Dirty Bit 01:支持更新Access Flag,不支持更新Dirty Bit 10:Reserved 11:支持更新Access Flag和Dirty Bit |
NUMS2CB[7:0], bits[23:16] | 只支持stage 2翻译格式 的Context Banks数,取值范围0~128。需要被SMMU_IDR0.S2TS使能。 |
SMCD, bit[15] | Stream Match Conflict Detection。 0:不检测所有的Stream match conflicts 1:检测所有的Stream match conflicts |
Bit[14] | Reserved |
SSDTP, bits[13:12] | SSD Table属性 00:SSD地址空间是UNK/WI 01:填充SSD地址空间,并支持NUMSSDNDXB标记的SSD_Index size 10:Reserved 11:扩展的SSD地址空间,并支持16bit的SSD_Index |
NUMSSDNDXB[3:0], bits[11:8] | 指示SSD表的索引数 |
NUMCB, bits[7:0] | Context Banks数,范围0~128,包含只支持stage 2格式的CB个数。如果系统支持stage 1,则stage1格式的CB数=SMMU_IDR1.NUMCB–SMMU_IDR1.NUMS2CB |
其中,SSD是Security State Determination的缩写。
SMMU_IDR2
Bit[31] | Reserved |
DIPANS, bit[30] | 数据和指令的“Privileged Access Never”支持 0:不支持;1:支持 |
COMPINDEXS. bit[29] | StreamID Compressed Indexing支持情况 0:不支持;1:支持 |
HADS, bit[28] | Hierarchical Attribute Disable支持情况 0:不支持;1:支持 |
E2HS, bit[27] | E2H context (E2HC)支持情况。EL2 Host. 1)Enables a configuration where a Host Operating System is running in EL2, 2)the Host Operating System's applications are running in EL0. 0:不支持;1:支持 |
EXNUMSMRG, bits[26:16] |
|
VMID16S, bit[15] | 16-bit VMID支持情况 0:只支持8-bit;1:支持16-bit |
PTFSv8_64kB, bit[14] | 64KB粒度翻译支持情况 0:不支持;1:支持 |
PTFSv8_16kB, bit[13] | 16KB粒度翻译支持情况 0:不支持;1:支持 |
PTFSv8_4kB, bit[12] | 4KB粒度翻译支持情况 0:不支持;1:支持 |
UBS, bits[11:8] | Upstream Bus Size 0b0000 32-bit upstream bus size. 0b0001 36-bit upstream bus size. 0b0010 40-bit upstream bus size. 0b0011 42-bit upstream bus size. 0b0100 44-bit upstream bus size. 0b0101 49-bit upstream bus size. 0b1111 64-bit upstream bus size. |
OAS, bits[7:4] | Output Address Size,指示PA的最大bit数 0b0000 32-bit. 0b0001 36-bit. 0b0010 40-bit. 0b0011 42-bit. 0b0100 44-bit. 0b0101 48-bit. |
IAS, bits[3:0] | IPA Address Size,指示IPA的最大bit数 0b0000 32-bit. 0b0001 36-bit. 0b0010 40-bit. 0b0011 42-bit. 0b0100 44-bit. 0b0101 48-bit. |
SMMU_IDR0-7描述了SMMU提供的系统能力信息,其中SMMU_IDR3~7略。
SMMU对address的处理顺序:
- 对于透传过来的翻译,如果地址操作了SMMU_IDR2.OAS设置的bit位,会被截断。然后,传递给translation context bank单元
- 对于符号扩展的,如用64bit或49bit的“UBS”,其中48位为地址,1位为符号位。需要进行处理。
- 输入输出地址size检测判断。
Stream mapping
如何通过streamID找到对应的CB。这里有两种模式:
Stream matching:
利用StreamID在 Stream Match registers(SMMU_SMRn)中查找,如果找到唯一的匹配(假设是SMMU_SMRx),则对应的 Stream-to-Context register(SMMU_S2CRx)中保存的CB就是要找的CB。
Stream indexing:
如果Stream indexing被使用,则StreamID直接指示SMMU_S2CRn的索引。比如,StreamID=m,则对应的CB保存在SMMU_S2CRm中。
以上两种模式的选择在SMMU_IDR0.SMS比特位。
还有一个Compressed StreamID indexing,暂时不讨论。
SMMU_SMRn
streamID匹配寄存器。
EXMASK, bits[31:16] | 屏蔽无关位 如果EXMASK[i]==1,则EXID[i]被忽略;相反,EXMASK[i]==0,则EXID[i]有效,用于匹配 |
EXID, bits[15:0] | 用于匹配的streamID |
SMMU_S2CRn
Stream-to-Context Register。
当使用Translation context即type=00时寄存器定义如下:
TRANSIENTCFG, bits[29:28] | Transient Allocate Configuration,瞬时分配配置 0b00 Use the default transient allocation attributes. 0b01 Reserved. 0b10 Non-transient. 0b11 Transient |
INSTCFG, bits[27:26] | 取指令属性配置 0b00 Default instruction fetch attribute. 0b01 Reserved. 0b10 Data. 0b11 Instruction. |
PRIVCFG, bits[25:24] | 特权属性配置 0b00 Default privilege attributes. 0b01 Meaning depends on the value of SMMU_IDR2.DIPANS: 0 Reserved. . 1 Data and Instruction Privileged Access Never. 0b10 Unprivileged. 0b11 Privileged |
WACFG, bits[23:22] | 写分配配置 0b00 Default allocation attributes. 0b01 Reserved. 0b10 Write-Allocate. 0b11 No Write-Allocate |
RACFG, bits[21:20] | 读分配配置 0b00 Default allocation attributes. 0b01 Reserved. 0b10 Read-Allocate. 0b11 No Read-Allocate |
NSCFG, bits[19:18] | 0b00 Default security attribute. 0b01 Reserved. 0b10 Secure configuration that only affects Secure SMMU_S2CRn entry. 0b11 Non-secure |
TYPE, bits[17:16] | Context type 0b00 Translation context bank index. 0b01 Bypass.mode 0b10 Fault, no index. 0b11 Reserved. Treated as a fault context |
MemAttr, bits[15:12] |
|
MTCFG, bit[11] | Memory Type Configuration 0 Default memory attributes. 1 MemAttr field attributes |
EXIDVALID, bit[10] | Extended ID Valid。如果 SMMU_sCR0.EXIDENABLE==0,此bit无效 0 The Stream Match Register group is invalid. 1 The Stream Match Register group is valid and SMMU_SMRn follows the Extended ID format。 |
SHCFG, bits[9:8] | 共享配置 0b00 Default Shareable attribute. 0b01 Outer Shareable. 0b10 Inner Shareable. 0b11 Non-shareable |
CBNDX bits[7:0] | Context Bank Index |
当使用Bypass mode即type 0b01,
其中bit[0~7]表示VMID,其余位定义参考手册。
SMMU_sCR0
全局配置寄存器。在支持2个Security状态的情况下,这个寄存器包含Non-secure的transactions和一些 Secure state控制下的Non-secure的transactions。2个Security状态的情况下,还有一个备份寄存器SMMU_CR0,提供Non-secure的transactions。
具体每一位的解释,详见手册。
SMMU_sGFSR
全局错误状态寄存器。
MULTI, bit[31] | 相同错误类型多次发生状态 0:没有;1:有 |
Bits[30:9] | Reserved |
UUT, bit 8 | 不支持的Upstream Transaction 0:没有;1:有不支持的client transaction |
PF, bit[7] | Permission fault 0:没有;1:有 |
EF, bit[6] | External fault 0:没有;1:有 |
CAF, bit[5] | Configuration access fault 0:没有;1:有 |
UCIF, bit[4] | 未实现的context interrupt fault 0:没有;1:有 |
UCBF, bit[3] | 未实现的context bank fault 0:没有;1:有 |
SMCF, bit[2] | Stream match conflict fault 0:没有;1:有 |
USF, bit[1] | Unidentified stream fault 0:没有;1:有 |
ICF, bit[0] | Invalid context fault 0:有;1:没有 |
使用方法:对应bit写1,进行清除;写0,保持原状。
SMMU_sGFAR
Global Fault Address Register。保存 SMMU_sGFSR中报告的错误发生的地址。
Bits[63:N] | Reserved |
FADDR, bits[N-1:0] | Fault address 针对“ configuration access fault”表示基于SMMU_BASE的offset;其他错误类型,则表示错误发生的输入地址。 |
其中位数N取决于SMMU_IDR2.UBS。
SMMU_TLBIALLH
TLB Invalidate All Hyp,让TLB中标记为Hyp的项失效。32-bit WO register。
SMMU_TLBIALLNSNH
TLB Invalidate All Non-secure Non-Hyp,让TLB中标记为Non-secure Non-Hyp的项失效。32-bit WO register。
全局地址空间1
SMMU_CBARn
Context Bank Attribute Registers。其SMMU_CBARn.TYPE域指示对应cb的translation context。这个域的值会影响剩余位的定义:
0b00:Stage 2 context;此CB只提供stage2的翻译 0b01:Stage 1 context with stage 2 bypass 0b10:Stage 1 context with stage 2 fault 0b11:Stage 1 followed by stage 2 translation context |
Stage 2 context, TYPE==0b00
Stage 1 context with stage 2 bypass, TYPE==0b01
Stage 1 context with stage 2 fault, TYPE==0b10
Stage 1 followed by stage 2 translation context, TYPE==0b11
SMMU_CBA2Rn
Context Bank Attribute Registers。作为SMMU_CBARn寄存器的扩展。
VMID16, bits[31:16] | 16-bit VMID |
Bits[15:2] | Reserved. |
MONC, bit[1] | Monitor context bank 0 Non-monitor context. Use VMID or ASID for TLB tagging 1 Monitor context. Do not use VMID or ASID for TLB tagging |
VA64, bit[0] | Virtual address width 0:32bit;1:64bit |
Stage1相关CB寄存器
SMMU_CBn_SCTLR
系统控制寄存器,提供关联CB的top-level控制。
Bits [31] | Reserved. |
UCI, bit[30] | 用户态缓存维护使能(EL0) 0:不使能;1:使能 |
NSCFG, bits[29:28] | Non-Secure配置 0b00 Default Non-secure attribute. 0b01 Reserved. 0b10 Secure. 0b11 Non-secure. |
WACFG, bits[27:26] | Write-Allocate配置 0b00 Default allocation attributes. 0b01 Reserved. 0b10 Write-Allocate. 0b11 No Write-Allocate. |
RACFG, bits[25:24] | Read-Allocate配置 0b00 Default allocation attributes. 0b01 Reserved. 0b10 Read-Allocate. 0b11 No Read-Allocate. |
SHCFG, bits[23:22] | 共享配置 0b00 Default shareable attribute. 0b01 Outer Shareable. 0b10 Inner Shareable. 0b11 Non-shareable |
Bit[21] | Reserved. |
MTCFG, bit[20] | 内存类型配置 0 Default memory attributes. 1 Use the MemAttr field for memory attributes. |
MemAttr, bits[19:16] |
|
TRANSIENTCFG, bits[15:14] | Transient Allocate配置 0x00 Default transient allocation attributes. 0x01 Reserved. 0x10 Non-transient. 0x11 Transient |
Bit[13] | Reserved |
ASIDPNE, bit[12] | ASID私有名字空间使能 0:全局;1:私有 |
Bit[11] | Reserved. |
UWXN, bit[10] | Unprivileged Writable Execute Never 0:不使能;1: |
WXN, bit[9] | Writable Execute Never. |
HUPCF, bit[8] | 上下文错误处理 0:stall或terminal;1:继续后续的翻译 |
CFCFG, bit[7] | 上下文错误配置 0:Terminate;1:Stall |
CFIE, bit[6] | 上下文错误是否触发中断 0:否;1:是 |
CFRE, bit[5] | 上下文错误是否触发abort 0:否;1:是 |
E, bit[4] | 大小端 0:小端;1:大端 |
AFFD, bit[3] | 0 Access flag faults are enabled. 1 Access flag faults are disabled. |
AFE, bit[2] |
|
TRE, bit[1] | TEX Remap Enable 0 TEX Remap is disabled. Bits TEX[2:0] are used with the C and B bits to describe the memory region attributes. 1 TEX Remap is enabled. Bits TEX[2:1] are reassigned for use as flags managed by the operating system. The TEX[0], C and B bits describe the memory region attributes, with the MMU remap registers |
M, bit[0] | MMU Enable。关联CB的MMU使能。 |
SMMU_CBn_RESUME
Resumes or terminates the operation of a stalled transaction。收到stalled错误报告之后,正确的resume这次transaction的顺序是:
- 软件根据fault(SMMU_CBn_FSR)的原因,进行相应处理
- 写 SMMU_CBn_FSR寄存器,清相应bit位
- 写SMMU_CBn_RESUME寄存器,清楚 SMMU_CBn_FSR.SS位。
Bits[31:1] | Reserved |
TnR, bit[0] | Terminate not Retry 0:Retry the stalled transaction;1:Terminate the stalled transaction |
SMMU_CBn_FSR
对应CB的Fault Status Register。
MULTI, bit[31] | 相同错误类型多次发生状态 0:没有;1:有 |
SS, bit[30] | Stalled Status(只读,只能通过SMMU_CBn_RESUME寄存器清除) 0:没有stall;1:stalled |
Bits[29:11] | Reserved |
Format, bits[10:9] | Translation scheme。 00:AArch32 Short-descriptor (SMMU_CBA2Rn.VA64=0; SMMU_CBn_TCR.EAE=0) 01:AArch32 Long-descriptor (SMMU_CBA2Rn.VA64=0; SMMU_CBn_TCR.EAE=1) 10:AArch64 translation(SMMU_CBA2Rn.VA64=1) 11:Reserved(也被认为是AArch64) |
UUT, bit 8 | Unsupported Upstream Transaction。 0:没有;1:有 |
ASF, bit[7] | Address size fault 0:没有;1:有 |
TLBLKF, bit[6] | TLB lock fault 0:没有;1:有 |
TLBMCF, bit[5] | TLB match conflict fault 0:没有;1:有 |
EF, bit[4] | External fault 0:没有;1:有 |
PF, bit[3] | Permission fault 0:没有;1:有 |
AFF, bit[2] | Access flag fault 0:没有;1:有 |
TF, bit[1] | Translation fault 0:没有;1:有 |
Bit[0] | Reserved |
SMMU_CBn_FAR
Fault Address Register。Holds the input address of the memory access that caused a synchronous abort exception。
Bits[63:N] | Reserved |
FADDR, bits[N-1:0] | 错误发生的输入地址 |
SMMU_CBn_TTBRm
页表基地址寄存器。m为0或者1,表示两个TTBR。
ASID[15:0], bits[63:48] | ASID号 SMMU_CBn_TCR.A1位决定是选SMMU_CBn_TTBR0.ASID 还是 SMMU_CBn_TTBR1.ASID |
Base Address [47:x] | 基地址,其中x由对应的T0SZ or T1SZ决定 |
Bits[x-1:0] | Reserved |
SMMU_CBn_TCR
Translation Control Register。在smmu v1这个寄存器叫SMMU_CBn_TTBCR。决定了translation的属性,包括ttbr寄存器的选择等。SMMU_CBn_CBA2R.VA64 == 1情况下,
TG1, bits[31:30] | TTBR1, for non-HYPC, non-MONC stage 1 translations的页粒度 0b00 Reserved. 0b01 16KB granule size. 0b10 4KB granule size. 0b11 64KB granule size |
SH1, bits [29:28] | 共享属性 |
ORGN1, bits [27:26] | 外部缓存属性 |
IRGN1, bits [25:24] | 内部缓存属性 |
EPD1, bit[23] | TLB miss情况下Translation Walk动作 0:a translation table walk is performed 1:no translation table walk is performed and an L1 Section translation fault is returned |
A1, bit[22] | ASID选择 0:从SMMU_CBn_TTBR0 ASID field选 1:从SMMU_CBn_TTBR1 ASID field选 |
T1SZ, bits[21:16] | 表示SMMU_CBn_TTBR1地址空间的大小——2^(64–T1SZ) |
TG0, bits[15:14] | TTBR0的页粒度 0b00 Reserved. 0b01 16KB granule size. 0b10 4KB granule size. 0b11 64KB granule size |
SH0, bits[13:12] | 共享属性 |
ORGN0, bits[11:10] | 外部缓存属性 |
IRGN0, bits[9:8] | 内部缓存属性 |
EPD0, bit[7] | TLB miss情况下Translation Walk动作 0:a translation table walk is performed 1:no translation table walk is performed and an L1 Section translation fault is returned |
Bit[6] | Reserved. |
T0SZ, bits[5:0] | 表示SMMU_CBn_TTBR0地址空间的大小——2^(64–T0SZ) |
SMMU_CBn_TCR2
Translation Control Register 2。 SMMU_CBn_TCR 寄存器的扩展,增加了translation粒度和IPA size的控制信息。
NSCFG1, bit[30] | Non-secure attribute with SMMU_CBn_TTBR1 |
SEP, bits[17:15] | Sign Extension Position 0b000 Bit[31] 0b001 Bit[35] 0b010 Bit[39] 0b011 Bit[41] 0b100 Bit[43] 0b101 Bit[47] 0b110 Reserved. This bit must be treated as 0b111. 0b111 The meaning of this bit depends on the upstream address bus size indicated by SMMU_IDR2.UBS, as follows: UBS==0b1111, 64-bit bus No sign extension is performed. UBS==0b0101, 49 bit bus Bit[48] is used as the sign bit, and is replicated to bits[63:49]. Other valid encodings of UBS The input address is zero-extended |
NSCFG0, bit[14] | Non-secure attribute with SMMU_CBn_TTBR0 |
HD, bit[11] | Hardware management of Dirty bit 0 Stage 1 Dirty bit update disabled. 1 Stage 1 Dirty bit update enabled |
HA, bit[10] | Hardware management of Access flag 0:disable;1:enable |
HAD1, bit[9] | Hierarchical Attribute Disable for the TTBR1 region 0:enble;1:disable |
HAD0, bit[8] | Hierarchical Attribute Disable for the TTBR0 region 0:enble;1:disable |
TBI1, bit[6] | Top Byte Ignored TTBR1 region 0:in use;1:ignore |
TBI0, bit[5] | Top Byte Ignored TTBR0 region 0:in use;1:ignore |
AS, bit[4] | ASID Size 0:8-bit;1:16-bit. |
PASize, bits[2:0] | Physical Address Size //IPA? 0b000 32-bits, 4GB 0b001 36-bits, 64GB 0b010 40-bits, 1TB 0b011 42-bits, 4TB 0b100 44-bits, 16TB 0b101 48-bits, 256TB All other values are reserved, and treated as 48-bits. |
SMMU_CBn_MAIRm
其中m=0或1。为mmu的TEX remap功能用的。就是将memory region attributes用TEX[2:0], C, and B bits进行编码,然后保存在页表中,
更多关于内存属性的信息,请参考手册。
Stage2相关CB寄存器
SMMU_CBn_SCTLR
System Control Register。
WACFG, bits[27:26] | 同stage1 |
RACFG, bits[25:24] | 同stage1 |
SHCFG, bits[23:22] | 同stage1 |
FB, bit[21] | Force Broadcast, forces the Broadcast of TLB maintenance, BPIALL, and ICIALLU operations |
MemAttr, bits[19:16] | 同stage1 |
BSU, bits[15:14] | Barrier Shareability Upgrade 0b00 No effect. 0b01 Inner Shareable. 0b10 Outer Shareable. 0b11 Full system. |
PTW, bit[13] | Protected Translation Walk 0 This behavior is not enabled. 1 Raise a stage 2 permission fault |
HUPCF, bit[8] | 同stage1 |
CFCFG, bit[7] | 同stage1 |
CFIE, bit[6] | 同stage1 |
CFRE, bit[5] | 同stage1 |
E, bit[4] | 同stage1 |
AFFD, bit[3] | 同stage1 |
AFE, bit[2] | 同stage1 |
TRE, bit[1] | 同stage1 |
M, bit[0] | 同stage1 |
SMMU_CBn_IPAFAR
IPA Fault Address Register。记录同时存在stage1和stage2状态,且发生在stage2的错误的 IPA。错误类型包括:
•Translation faults.
•Access faults.
•External faults.
•Address size faults.
FADDR, bits[M-1:N] | Fault address, the IPA of the faulting access. |
SMMU_CBn_TCR
为stage2 Translation提供额外的配置。SMMU_CBA2Rn.VA64==1情况下,寄存器布局
HD, bit[22] | Hardware management of Dirty bit 0 Stage 2 Dirty bit update disabled. 1 Stage 2 Dirty bit update enabled |
HA, bit[21] | 同stage1 |
PASize, bits[18:16] | Physical address size。 0b000 32-bits, 4GB 0b001 36-bits, 64GB 0b010 40-bits, 1TB 0b011 42-bits, 4TB 0b100 44-bits, 16TB 0b101 48-bits, 256TB All other values are reserved, and treated as 48-bits |
TG0, Bits[15:14] | 同stage1 |
SH0, bits[13:12] | 同stage1 |
ORGN0, bits[11:10] | 同stage1 |
IRGN0, bits[9:8] | 同stage1 |
SL0, bits[7:6] | 其实查找level,依赖于TG0 field。 4KB translation granule 0b00 Level 2. 0b01 Level 1. 0b10 Level 0. 16KB or 64KB translation granule 0b00 Level 3. 0b01 Level 2. 0b10 Level 1. |
T0SZ, bits[5:0] | 同stage1 |
SMMU_CBn_TTBR0
同stage1