MIPS和MHz的区别

MIPS vs MHz

MHz（兆赫）是每秒的时钟周期数。这通常由电路板上的晶体振荡器决定。例如，如果处理器或内存的运行频率为 20MHz，那么每秒就有 2 千万个时钟周期。它如何利用这些时钟周期完全取决于芯片。

有些处理器每个时钟脉冲执行一条指令。有些处理器则需要几个时钟脉冲来执行某些（或所有）指令。例如，简单的 x51 型处理器在 12 个时钟周期内执行一条简单指令。他们称这 12 个时钟周期为一个机器周期。较新的变种处理器每个机器周期可能只需要 4 个时钟周期，因此在相同的时钟频率下运行速度快 3 倍（执行的指令多 3 倍）。

这就是 MIPS 的由来。MIPS 是指每秒百万条指令。也就是说，实际执行的指令数量--它可能与上述时钟频率不同。

例如，如果一个老式 x51 CPU 的时钟频率为 24MHz，每个机器周期需要 12 个时钟周期，那么它可以执行 2 MIPS（24MHz/12 个周期）。即便如此，某些指令的执行时间可能超过一个机器周期，因此实际程序的运行速度可能低于这个数值。如果使用更现代版本的内核，每个机器周期使用 4 个时钟周期，那么处理指令的速度将达到 6 MIPS（24/4）--在相同时钟频率下快 3 倍。

如果比较类似类型的 CPU，MIPS 比 MHz 能提供更有意义的速度比较。

MHz (Megahertz) is the number of clock cycles every second. This is usually determined by a crystal oscillator on the board somewhere. For instance, if your processor or memory runs at 20MHz, it gets 20 million clock cycles every second. What it does with this depends entirely on the chip.

Some processors will perform one instruction for every clock pulse. Some will take several clock pulses for some (or all) instructions. For instance, the simple x51-type processors perform one simple instruction in 12 clock cycles. They call these 12 clock cycles one machine cycle. More recent varients may only take 4 clock cycles for each machine cycle, thus running 3 times faster (doing 3 times more instructions) on the same clock frequency.

This is where MIPS comes in. MIPS is Millions of Instructions Per Second. That is, how many actual instructions are performed - it may be different from the clock frequency as described above.

For instance, if an old x51 cpu has a clock of 24MHz, and takes 12 clock cycles per machine cycle, it can do 2 MIPS (24MHz/12 cycles). Even then, some instructions may take more than one machine cycle to perform so an actual program may run at less than this. If a more modern version of the core is used, that uses 4 clock cycles per machine cycle, it will process instructions at a rate of 6 MIPS (24/4) - 3 times faster for the same clock.

If comparing similar types of cpu, MIPS gives a more meaningful comparison of speed than MHz.

DMIPS

DMIPS 数字由 ARM 公布，几乎所有供应商都使用它们。

根据编译器的优化，有三种 DMIPS 数值。

DMIPS/MHz 是指每 1MHz 时钟频率下的 DMIPS。

关于 Cortex-M3，它们分别是 1.25/1.50/1.89 DMIPS/MHz。

关于 Cortex-M4，它们分别是 1.25/1.52/1.91 DMIPS/MHz（不含 FPU）和 1.27/1.55/1.95 DMIPS/MHz（含 FPU）。

我不知道为什么有 FPU 时数字会增加。

DMIPS 是 Dhrystone MIPS 的缩写，它是根据 VAX-11 的相对性能来衡量的。

Dhrystone 基准测试的是整数性能。

从 DIMIPS/MHz 的角度来看，Cortex-M3 等同于 Cortex-M4，因为除了 FPU 之外，两者的实现是相同的。

因此，时钟频率越高，性能越好。

无论如何，DMIPS 数值指的是最好的运行情况，并不总能在实际设备上重现。

简单地说，Cortex-M4 在 100MHz 时的性能为 125DMIPS，比 Cortex-M3 的 100DIMIPS 好。

The DMIPS numbers are announced by ARM and almost all vendor use them.

There are three DMIPS numbers according to the compiler optimization.

DMIPS/MHz is the DMIPS per 1MHz clock frequency.

Regarding Cortex-M3, they are 1.25/1.50/1.89 DMIPS/MHz.

Regarding Cortex-M4, they are 1.25/1.52/1.91 DMIPS/MHz (without FPU) and 1.27/1.55/1.95 DMIPS/MHz (with FPU).

I don't know why the number increases with the FPU.

DMIPS is the abbreviation of Dhrystone MIPS which is measured by the relative performance of VAX-11.

And Dhrystone benchmark measures an integer performance.

From DIMIPS/MHz view point, Cortex-M3 is equivalent to Cortex-M4 because the implementations are the same other than FPU.

Therefore the higher clock frequency has, the better performance gains.

Anyway, the DMIPS number is the best case and it would not always reproduce on the real device.

Simply thinking, Cortex-M4 at 100MHz takes 125DMIPS which is better than Cortex-M3's 100DIMIPS.

Dhrystone 是一种标准化的速度测试，具有特定的工作负载组合。

不同的 CPU 架构有不同的优缺点。例如，75 MHz 的 SPARC 在 AES 方面可以轻松击败 400 MHz 的 PentiumII，但在 zlib 解压缩方面则处于下风，因此无法判断哪个更快。

Whetstone 和 Dhrystone 测试都是合成测试，由于其组成成分，主要用作科学计算的基准，但对于更接近 "实际 "工作负载的测试，目前还没有达成共识，尤其是嵌入式设备的实际工作负载将包括大量空闲时间。

Dhrystone 测试的结果是以每秒计算次数为单位表示的，这并不一定与每秒 CPU 实际指令数相对应，但却更具有可比性。

Dhrystone is a standardized speed test with a specific workload mix.

Different CPU architectures have different strengths and weaknesses. For example, a 75 MHz SPARC easily beats a 400 MHz PentiumII at AES, but loses in zlib decompression, so there is no way to tell which one is faster.

The Whetstone and Dhrystone tests are both synthetic tests that are useful mostly as a benchmark for scientific computing because of their composition, but there is no consensus on anything that is closer to a "realistic" workload, especially as realistic workloads for embedded devices will consist of a lot of idle time.

The result from a Dhrystone test is expressed in a unit of calculations per second, which does not necessarily correspond to actual CPU instructions per second, but is a tiny bit more comparable.

Dhrystone 是一个非常古老的标准化基准软件的名称，其结果是测得的 MIPS（MIPS 即每秒百万条指令）数。这个数字是根据很久以前的计算机调整的，但这并不重要。

1.25DMIPS/MHz 意味着您的 CPU 在 100MHz 时的速度为 125MIPS

例如，它将慢于以 80MHz 运行的 1.8DMIPS/MHz CPU

对于现代高性能 CPU 而言，DMIPS 是一种非常不完善的测量方法，但对于小型微控制器而言，它仍有一定意义。(还有 CoreMark）

Dhrystone is the name of a standardised a very old benchmark software, it gives as result the measured number of MIPS, where MIPS is Million Instructions Per Second. The figure was adjusted from long gone computers, but it doesn't matter.

1.25DMIPS/MHz means that your CPU will be 125MIPS at 100MHz

For example, it will be slower than a 1.8DMIPS/MHz CPU running at 80MHz

DMIPS is a very flawed measurement method for modern high performance CPUs, but it is still a bit relevant for small microcontrollers. (there is also CoreMark)

DMIPS即以dhrystone程式为测量方式标准的mips值。

MIPS即million instruction per second，每秒百万个指令，即处理器每秒能运行多少百万个指令。每秒运行多少百万个dhrystone指令的就叫dmips。

以VAX-11/780机器上的测试结果1757 Dhrystones/s定义为1 Dhrystone MIPS，即1 DMIPS =1757D/s，而其他处理器相对VAX-11在0.78mhz的比值，作为多少DMIPS，比如是vax-11的2倍，就是2 DMIPS。

DMIPS是一个非常老的标准，受编译器影响，不反应工艺制程的影响，不反应二缓，三缓等影响，纯粹只能简单参考。而且dmips反应的是整数运算能力，不反应浮点能力。

DMIPS的算法有两种。

一是运行dhrystone，源码在arm官网有下载，分别是dhry.h、dhry_1.c、dhry_2.c三个代码文件。

第二种就是简单测算，使用架构的平均理论IPC，处理器某频率的IPC值进行约算。IPC即instructtion per cycle，每秒指令数，单位是DMIPS/MHz。arm的soc比较喜欢用这个参数。

DMIPS简单说只是一般参考价值，不过比背CoreMark，spec int要方便，而且计算容易，不同架构频率对比一目了然。

=== Wiki ===

Dhrystone 是一个合成计算基准程序，由 Reinhold P. Weicker 于 1984 年开发，旨在代表系统（整数）编程。Dhrystone 后来逐渐成为通用处理器（CPU）性能的代表。Dhrystone "这个名字是对另一种名为 "Whetstone "的基准算法的双关语，后者强调浮点性能。

通过 Dhrystone，Weicker 收集了大量软件的元数据，包括用 FORTRAN、PL/1、SAL、ALGOL 68 和 Pascal 编写的程序。然后，他根据各种常见构造对这些程序进行了特征描述：过程调用、指针间接、赋值等。在此基础上，他编写了 Dhrystone 基准，以对应具有代表性的混合程序。Dhrystone 以 Ada 版本发布，里克-理查森（Rick Richardson）为 Unix 开发的 C 版本（"1.1 版"）极大地促进了它的普及。

Dhrystone is a synthetic computing benchmark program developed in 1984 by Reinhold P. Weicker intended to be representative of system (integer) programming. The Dhrystone grew to become representative of general processor (CPU) performance. The name "Dhrystone" is a pun on a different benchmark algorithm called Whetstone, which emphasizes floating point performance.

With Dhrystone, Weicker gathered meta-data from a broad range of software, including programs written in FORTRAN, PL/1, SAL, ALGOL 68, and Pascal. He then characterized these programs in terms of various common constructs: procedure calls, pointer indirections, assignments, etc. From this he wrote the Dhrystone benchmark to correspond to a representative mix. Dhrystone was published in Ada, with the C version for Unix developed by Rick Richardson ("version 1.1") greatly contributing to its popularity.

Dhrystone 与 Whetstone

Dhrystone 基准不包含浮点运算，因此其名称是对当时流行的浮点运算 Whetstone 基准的相关语。该基准的输出结果是每秒 Dhrystone 的数量（每秒主代码循环的迭代次数）。

Whetstone 和 Dhrystone 都是合成基准，也就是说，它们都是经过精心设计的简单程序，目的是在统计上模拟某些常见程序集的处理器使用情况。Whetstone 开发于 1972 年，最初的目的是根据 1970 年的测量结果模仿典型的 Algol 60 程序，但最终以其 Fortran 版本最为流行，反映了 20 世纪 60 年代计算的高度数值化倾向。

Dhrystone vs. Whetstone

The Dhrystone benchmark contains no floating point operations, thus the name is a pun on the then-popular Whetstone benchmark for floating point operations. The output from the benchmark is the number of Dhrystones per second (the number of iterations of the main code loop per second).

Both Whetstone and Dhrystone are synthetic benchmarks, meaning that they are simple programs that are carefully designed to statistically mimic the processor usage of some common set of programs. Whetstone, developed in 1972, originally strove to mimic typical Algol 60 programs based on measurements from 1970, but eventually became most popular in its Fortran version, reflecting the highly numerical orientation of computing in the 1960s.

Issues addressed by Dhrystone (解决的问题)

Dhrystone 作为新型计算机通用（"整数"）性能指标的重要性最终使其成为商业编译器编写者的目标。各种现代编译器静态代码分析技术（如消除死代码：例如，使用处理器但产生内部结果却不被使用或输出的代码）使合成基准的使用和设计变得更加困难。Weicker 和 Richardson 于 1988 年 3 月发布的 2.0 版基准有许多变化，目的是挫败一系列编译器技术。然而，该版本经过精心设计，并未改变基本基准。这种挫败编译器的努力只取得了部分成功。同年 5 月发布的 Dhrystone 2.1 有一些微小的改动，截至 2010 年 7 月仍是 Dhrystone 的当前定义。

Dhrystone's eventual importance as an indicator of general-purpose ("integer") performance of new computers made it a target for commercial compiler writers. Various modern compiler static code analysis techniques (such as elimination of dead code: for example, code which uses the processor but produces internal results which are not used or output) make the use and design of synthetic benchmarks more difficult. Version 2.0 of the benchmark, released by Weicker and Richardson in March 1988, had a number of changes intended to foil a range of compiler techniques. Yet it was carefully crafted so as not to change the underlying benchmark. This effort to foil compilers was only partly successful. Dhrystone 2.1, released in May of the same year, had some minor changes and as of July 2010 remains the current definition of Dhrystone.

除了与编译器优化有关的问题外，Dhrystone 还存在其他各种问题。其中大部分问题，包括代码体积小和数据集体积小，在 1984 年 Dhrystone 出版时就已被理解。更微妙的是字符串操作的比例略高，这主要与语言有关：Ada 和 Pascal 语言都将字符串作为普通变量，而 C 语言没有，因此参考基准中的简单变量赋值在 C 库中变成了缓冲区复制操作。另一个问题是，报告的分数不包括在比较系统时至关重要的信息，如使用了哪种编译器以及进行了哪些优化。

Other than issues related to compiler optimization, various other issues have been cited with the Dhrystone. Most of these, including the small code size and small data set size, were understood at the time of its publication in 1984. More subtle is the slight over-representation of string operations, which is largely language-related: both Ada and Pascal have strings as normal variables in the language, whereas C does not, so what was simple variable assignment in reference benchmarks became buffer copy operations in the C library. Another issue is that the score reported does not include information which is critical when comparing systems such as which compiler was used, and what optimizations.

作为一个简单的基准测试，Dhrystone 的适应性仍然很强，但它在确定真实性能方面的持续价值值得怀疑。Dhrystone 易于使用、文档齐全、完全独立、易于理解，几乎可以在任何系统上运行。尽管最近开发的 EEMBC 基准套件、CoreMark 独立基准、HINT、Stream 甚至 Bytemark 以及针对内存子系统（Cachebench）、TCP/IP（TTCP）和许多其他系统的更具体的基准被广泛引用和使用，但它在嵌入式计算领域仍然得到广泛应用。

Dhrystone remains remarkably resilient as a simple benchmark, but its continuing value in establishing true performance is questionable. It is easy to use, well documented, fully self-contained, well understood, and can be made to work on almost any system. In particular, it has remained in broad use in the embedded computing world, though the recently developed EEMBC benchmark suite, the CoreMark standalone benchmark, HINT, Stream, and even Bytemark are widely quoted and used, as well as more specific benchmarks for the memory subsystem (Cachebench), TCP/IP (TTCP), and many others.

Results 结果

Dhrystone 表示的结果可能比 MIPS（每秒百万条指令）更有意义，因为不同指令集（如 RISC 与 CISC）之间的指令数比较可能会混淆简单的比较。例如，同样的高级任务在 RISC 机器上可能需要更多的指令，但执行速度可能比单条 CISC 指令更快。因此，Dhrystone 分数只计算每秒程序迭代完成的次数，允许每台机器以特定机器的方式进行计算。Dhrystone 基准的另一种常见表示方法是 Dhrystone 分数除以 1757（VAX 11/780 上每秒完成的 Dhrystone 次数，名义上是 1 MIPS 机器）后得到的 DMIPS（Dhrystone MIPS）。

另一种表示结果的方法是 DMIPS/MHz，即 DMIPS 结果再除以 CPU 频率，以便于比较在不同时钟频率下运行的 CPU。

Dhrystone may represent a result more meaningfully than MIPS (million instructions per second) because instruction count comparisons between different instruction sets (e.g. RISC vs. CISC) can confound simple comparisons. For example, the same high-level task may require many more instructions on a RISC machine, but might execute faster than a single CISC instruction. Thus, the Dhrystone score counts only the number of program iteration completions per second, allowing individual machines to perform this calculation in a machine-specific way. Another common representation of the Dhrystone benchmark is the DMIPS (Dhrystone MIPS) obtained when the Dhrystone score is divided by 1757 (the number of Dhrystones per second obtained on the VAX 11/780, nominally a 1 MIPS machine).

Another way to represent results is in DMIPS/MHz, where DMIPS result is further divided by CPU frequency, to allow for easier comparison of CPUs running at different clock rates.

使用 Dhrystone 作为基准存在缺陷：

• 它的代码不寻常，通常不能代表现代现实生活中的程序。

• 它容易受到编译器优化的影响。例如，为了测量字符串复制性能，它进行了大量的字符串复制。然而，Dhrystone 中的字符串是已知的恒定长度，而且它们的起始位置是在自然边界上对齐的，而这两点是真实程序通常不具备的。因此，优化程序可以将字符串复制替换为没有任何循环的字移动序列，这样速度会快很多。因此，这种优化会高估系统性能，有时会高估 30% 以上。

• Dhrystone 的代码量较小，可以放入现代 CPU 的指令缓存中，因此指令提取性能没有经过严格测试。同样，Dhrystone 也可能完全适合数据缓存，因此不会影响数据缓存的未命中性能。为了应对适合缓存问题，1988 年创建了 SPECint 基准，其中包括一套（最初为 8 个）更大的程序（包括一个编译器），这些程序无法放入当时的 L1 或 L2 缓存中。

Shortcomings

Using Dhrystone as a benchmark has pitfalls:

* It features unusual code that is not usually representative of modern real-life programs.[2]

* It is susceptible to compiler optimizations. For example, it does a lot of string copying in an attempt to measure string copying performance. However, the strings in Dhrystone are of known constant length and their starts are aligned on natural boundaries, two characteristics usually absent from real programs. Therefore, an optimizer can replace a string copy with a sequence of word moves without any loops, which will be much faster. This optimization consequently overstates system performance, sometimes by more than 30%.[3]

* Dhrystone's small code size may fit in the instruction cache of a modern CPU, so that instruction fetch performance is not rigorously tested.[2] Similarly, Dhrystone may also fit completely in the data cache, thus not exercising data cache miss performance. To counter fits-in-the-cache problem, the SPECint benchmark was created in 1988 to include a suite of (initially 8) much larger programs (including a compiler) which could not fit into L1 or L2 caches of that era.

参考：

1，Edaboard

Whats the difference between MIPS and MHz? | Forum for Electronics

2，NXP

Difference DMIPS and DMIPS/MHz - NXP Community

3，StackExchange

microcontroller - What is DMIPS/MHz? - Electrical Engineering Stack Exchange

4, Baidu

百度安全验证

5，Wiki

https://en.wikipedia.org/wiki/Dhrystone