在主机的测试环境的搭建好之后,需要调整Android系统源码,否则将达不到测试的目录,完成之后需要关闭部分对应的调整。
1、preloader部分的调整
1)修改vendor\mediatek\proprietary\bootable\bootloader\preloader\custom\evb3561sv_w_no2\evb3561sv_w_no2.mk
添加DDR压力测试的编译开关到当前的项目中
MTK_EMMC_SUPPORT_OTP=no
ATC_BOOTTIME_OPTIMIZATION=yes
ATC_DRR_STREE_TEST=yes
MTK_COMBO_NAND_SUPPORT=no
2)修改vendor\mediatek\proprietary\bootable\bootloader\preloader\platform\mt3561\feature.mak
添加针对公共代码是否将压力测试添加的部分编译进入系统
ifeq ("$(MTK_EMMC_SUPPORT_OTP)","yes")
C_OPTION += -DMTK_EMMC_SUPPORT_OTP
endif
ifneq ("$(ATC_BOOTTIME_OPTIMIZATION)","yes")
C_OPTION += -DFLYAUDIO_BOOTTIME_OPTIMIZATION
endif
ifeq ("$(ATC_DRR_STREE_TEST)","yes")
C_OPTION += -DATC_DRR_STREE_TEST_SUPPORT
endif
ifeq ("$(MTK_COMBO_NAND_SUPPORT)","yes")
C_OPTION += -DMTK_COMBO_NAND_SUPPORT
endif
3)修改vendor\mediatek\proprietary\bootable\bootloader\preloader\platform\mt3561\src\drivers\inc\dramc2.h,打开ETT压力测试开关。
//#define H9TQ64A8GTMCUR_KUM
//#define KMQ8X000SA_B414
//#define KMQ7X000SA_B315
//#define VmFix_VcHV
//#define VmFix_VcNV
//#define VmFix_VcLV
//#define CUSTOM_CONFIG_MAX_DRAM_SIZE 0x3F000000
//#define ENABLE_SYNC_MASK
#ifdef ATC_DRR_STREE_TEST_SUPPORT
#define pmic_HQA_TCs
#endif
//#define WAVEFORM_MEASURE
//#define DRAM_INIT_CYCLES
//#define MAX_DRAM_DRIVING
//#define MAX_DRAMC_DRIVING
// End of Compile Option
4)修改vendor\mediatek\proprietary\bootable\bootloader\preloader\platform\mt3561\src\drivers\emi.c
修改pmic_HQA_voltage_adjust 函数中的对应HV/LV /NV的 MT6328_VCORE1_CON11/MT6328_SLDO_ANA_CON1。以LTHV测试项为例,即把LTHV 的ETT log中所设置的0x65,0xD (该数值仅为举例说明,以贵司实际读到的数值为准) 数值写入pmic_HQA_Voltage_adjust函数中HVcHVm 的case 中. 而我们ETT针对HV、LV、NV分别测试跑出来的log信息如下:
HV(高温60度):
G : Start the ETT test. Delay 40s
D : Disable Delay 40s before start ETT...
P : Print voltage settings
V : Voltage adjustment.
Please enter selection:v
.
Vmem (HV, NV, LV)=(1.30, 1.22, 1.16)
Vcore(HV, NV, LV)=(1.23, 1.15, 1.07)
1 : (Vmem HV:1.30, Vcore HV:1.230)
2 : (Vmem NV:1.22, Vcore NV:1.15)
3 : (Vmem LV:1.16, Vcore LV:1.07)
4 : (Vmem LV:1.16, Vcore HV:1.230)
5 : (Vmem HV:1.30, Vcore LV:1.07)
6 : (Vmem NV:1.22, Vcore HV:1.230)
7 : (Vmem NV:1.22, Vcore LV:1.07)
8 : (Vcore ) ++ ...
9 : (Vcore ) -- ...
Please enter pattern selection:(1-7)1
(Vmem HV, Vcore HV) had been set...
[PMIC]pmic_voltage_read :
[Vcore] MT6328_VCORE1_CON11=0x65,
[Vmem] MT6328_SLDO_ANA_CON0/1=0x0 0xD
LV(低温-30度):
ETT
G : Start the ETT test. Delay 40s
D : Disable Delay 40s before start ETT...
P : Print voltage settings
V : Voltage adjustment.
Please enter selection:v
.
Vmem (HV, NV, LV)=(1.30, 1.22, 1.16)
Vcore(HV, NV, LV)=(1.23, 1.15, 1.07)
1 : (Vmem HV:1.30, Vcore HV:1.230)
2 : (Vmem NV:1.22, Vcore NV:1.15)
3 : (Vmem LV:1.16, Vcore LV:1.07)
4 : (Vmem LV:1.16, Vcore HV:1.230)
5 : (Vmem HV:1.30, Vcore LV:1.07)
6 : (Vmem NV:1.22, Vcore HV:1.230)
7 : (Vmem NV:1.22, Vcore LV:1.07)
8 : (Vcore ) ++ ...
9 : (Vcore ) -- ...
Please enter pattern selection:(1-7)3
(Vmem LV, Vcore LV) had been set...
[PMIC]pmic_voltage_read :
[Vcore] MT6328_VCORE1_CON11=0x4B,
[Vmem] MT6328_SLDO_ANA_CON0/1=0x0 0x4
NV(正常25度):
G : Start the ETT test. Delay 40s
D : Disable Delay 40s before start ETT...
P : Print voltage settings
V : Voltage adjustment.
Please enter selection:v
.
Vmem (HV, NV, LV)=(1.30, 1.22, 1.16)
Vcore(HV, NV, LV)=(1.23, 1.15, 1.07)
1 : (Vmem HV:1.30, Vcore HV:1.230)
2 : (Vmem NV:1.22, Vcore NV:1.15)
3 : (Vmem LV:1.16, Vcore LV:1.07)
4 : (Vmem LV:1.16, Vcore HV:1.230)
5 : (Vmem HV:1.30, Vcore LV:1.07)
6 : (Vmem NV:1.22, Vcore HV:1.230)
7 : (Vmem NV:1.22, Vcore LV:1.07)
8 : (Vcore ) ++ ...
9 : (Vcore ) -- ...
Please enter pattern selection:(1-7)2
(Vmem NV, Vcore NV) had been set...
[PMIC]pmic_voltage_read :
[Vcore] MT6328_VCORE1_CON11=0x58,
[Vmem] MT6328_SLDO_ANA_CON0/1=0x0 0x1
从以上信息可以知道,我们代码vendor\mediatek\proprietary\bootable\bootloader\preloader\platform\mt3561\src\drivers\emi.c中的pmic_HQA_Voltage_adjust函数中HVcHVm 的case中的代码已经包含了相应的设置,所以不需要修改,如下:
void pmic_HQA_Voltage_adjust(int nAdjust)
{
switch (nAdjust) {
case 0: //HVcHVm //HV(高温60度,并且我们的MACH_TYPE是MT3561s)
//pmic_config_interface(MT6328_VCORE1_CON11, 0x6B, 0x7F, 0); // 1.265V
#if defined(MACH_TYPE_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x71, 0x7F, 0); // 1.310V
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x65, 0x7F, 0); // 1.230V
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x0D, 0xF, 8); // +0.6V (1.3V)
printf("========== HVcHVm ==========\r\n");
break;
case 1: //HVcLVm
//pmic_config_interface(MT6328_VCORE1_CON11, 0x6B, 0x7F, 0); // 1.265V
#if defined(MACH_TYPE_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x71, 0x7F, 0); // 1.310V
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x04, 0xF, 8); // -0.8V (1.16V)
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x65, 0x7F, 0); // 1.230V
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x05, 0xF, 8); // -1.0V (1.14V)
#endif
printf("========== HVcLVm ==========\r\n");
break;
case 2: //LVcHVm //LV(低温-30度)
//pmic_config_interface(MT6328_VCORE1_CON11, 0x46, 0x7F, 0); // 1.035V
#if defined(MACH_TYPE_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x54, 0x7F, 0); // 1.125V
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x4B, 0x7F, 0); // 1.070V
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x0D, 0xF, 8); // +0.6V (1.3V)
printf("========== LVcHVm ==========\r\n");
break;
case 3: //LVcLVm
//pmic_config_interface(MT6328_VCORE1_CON11, 0x46, 0x7F, 0); // 1.035V
#if defined(MACH_TYPE_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x54, 0x7F, 0); // 1.125V
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x04, 0xF, 8); // -0.8V (1.16V)
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x4B, 0x7F, 0); // 1.070V
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x05, 0xF, 8); // -1.0V (1.14V)
#endif
printf("========== LVcLVm ==========\r\n");
break;
case 4: //NV (正常25度)
#if defined(MACH_TYPE_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x68, 0x7F, 0); // 1.25V
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x58, 0x7F, 0); // 1.15V
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x01, 0xF, 8); // -0.2V (1.22V)
printf("========== NV ==========\r\n");
break;
default: //NV
#if defined(MACH_TYPE_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x68, 0x7F, 0); // 1.25V
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x58, 0x7F, 0); // 1.15V
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x01, 0xF, 8); // -0.2V (1.22V)
printf("========== NV ==========\r\n");
break;
}
}
5、vendor\mediatek\proprietary\bootable\bootloader\preloader\platform\mt3561\src\drivers\platform.c
这个文件中, 在platform_pre_init 函数中,添加如下红色的code。所添加的pmic_HQA_Voltage_adjust函数,其参数0 , 3, 4分别代表了HV,LV,NV,开启不同的参数代表不同的测试项(即LTHV/HTLV/NTNV)。同时添加头文件。
#include "ncp1854.h"
#ifdef ATC_DRR_STREE_TEST_SUPPORT
#include "dramc.h"
#endif
........................
void platform_pre_init(void)
{
.........................................
check_charger_boost_status();
#if !CFG_FPGA_PLATFORM
pmic_ret = pmic_init();
#ifdef ATC_DRR_STREE_TEST_SUPPORT
//adde for stress test start
pmic_force_PWM_Mode();
//HVcore HVmem
//pmic_HQA_Voltage_adjust(0); //HV测试时打开此处
//LVcore LVmem
//pmic_HQA_Voltage_adjust(3); //LV测试时打开此处
//NVcore NVmem
pmic_HQA_Voltage_adjust(4); //NV测试时打开此处
//adde for stress test end
#endif
mt_pll_post_init();
//mt_arm_pll_sel();
#ifdef FLYAUDIO_BOOTTIME_OPTIMIZATION
BOOTING_TIME_PROFILING_LOG("PMIC");
#endif
#endif
//enable long press reboot function
PMIC_enable_long_press_reboot();
.......................
}
.................................................
2、kernel内核代码调整部分
在进行代码调整之前,首先添加DDR压力测试的开关,在测试完成之后关闭开关,将关闭所有测试代码的调整
1)添加内核DDR压力测试的代码调整开关
在
kernel-3.18\arch\arm64\configs\evb3561sv_w_no2_debug_defconfig
kernel-3.18\arch\arm64\configs\evb3561sv_w_no2_defconfig
中添加
CONFIG_CROSS_COMPILE="aarch64-linux-android-"
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_ATC_DDR_STREE_TEST=y //添加开关
在kernel-3.18\drivers\misc\mediatek\power\Kconfig文件中添加配置
# Power Related
config MTK_PMIC
bool "MediaTek PMIC driver"
default y
---help---
MediaTek PMIC driver
config ATC_DDR_STREE_TEST //添加DDR压力测试开关的内核配置
bool "DDR STREE TEST"
---help---
MediaTek DDR STREE TEST
2、在kernel-3.18\drivers\misc\mediatek\base\power\mt3561\mt_vcore_dvfs_2.c的init_vcorefs_pwrctrl函数中,分别把高档写到OPPI_PERF_ULTRA, OPPI_PERF,把低档写到OPPI_LOW_PWR; if ( i == OPPI_LOW_PWR )语句需要手动添加
– DVS : 0x65(高档) <-> 0x54(低档) (HV)
– DVS : 0x58 (高档) <-> 0x48 (低档) (NV)
– DVS : 0x4B (高档) <-> 0x3C (低档) (LV)
2.1)首先添加针对HV、NV、LV的测试开关,在测试其中任何一项时打开这个开关即可,如下:
#include "mt_vcore_dvfs.h"
#include "mt_cpufreq.h"
#include "mt_spm.h"
#include "mt_ptp.h"
#if defined(CONFIG_ATC_DDR_STREE_TEST)
#define HVcore_TEST 0 //HV test
#define LVcore_TEST 0 //LV test
#define NVcore_TEST 1 //NV test
#endif
2.2)在init_vcorefs_pwrctrl(void)函数中添加HV、NV、LV测试代码
/**************************************
* Init Function
**************************************/
static int init_vcorefs_pwrctrl(void)
{
int i;
struct vcorefs_profile *pwrctrl = &vcorefs_ctrl;
struct opp_profile *opp_ctrl_table = opp_table;
mutex_lock(&vcorefs_mutex);
pwrctrl->curr_vcore_uv = get_vcore_uv();
BUG_ON(pwrctrl->curr_vcore_uv == 0);
pwrctrl->curr_ddr_khz = get_ddr_khz();
vcorefs_crit("curr_vcore_uv: %u, curr_ddr_khz: %u\n", pwrctrl->curr_vcore_uv, pwrctrl->curr_ddr_khz);
#if defined(CONFIG_ATC_DDR_STREE_TEST) //压力测试
//adde for stress test start
//HVcore HVmem
#if HVcore_TEST
for (i = 0; i < NUM_OPP; i++) {
if (i == OPPI_PERF_ULTRA) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x65);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_PERF) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x65);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_LOW_PWR) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x54);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(1);
}
#endif
//LVcore LVmem
#if LVcore_TEST
for (i = 0; i < NUM_OPP; i++) {
if (i == OPPI_PERF_ULTRA) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x58);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_PERF) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x58);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_LOW_PWR) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x48);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(1);
}
#endif
//NVcore NVmem
#if NVcore_TEST
for (i = 0; i < NUM_OPP; i++) {
if (i == OPPI_PERF_ULTRA) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x4B);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_PERF) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x48);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_LOW_PWR) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x3c);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(1);
}
#endif
#else //否则系统正常启动
for (i = 0; i < NUM_OPP; i++) {
if (i == OPPI_PERF_ULTRA) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(get_vcore_ptp_volt(VCORE_1_P_25_UV));
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_PERF) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(get_vcore_ptp_volt(VCORE_1_P_15_UV));
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_LOW_PWR) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(get_vcore_ptp_volt(VCORE_1_P_05_UV));
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(1);
}
#endif
vcorefs_crit("OPP %d: vcore_uv = %u, ddr_khz = %u\n",
i, opp_ctrl_table[i].vcore_uv, opp_ctrl_table[i].ddr_khz);
}
update_vcore_pwrap_cmd(opp_ctrl_table);
mutex_unlock(&vcorefs_mutex);
return 0;
}
3、kernel-3.18\drivers\misc\mediatek\dramc\mt3561\mt_dramc.c
参考preloader调整中的4)部分ETT针对高中低温测试的log信息,修改pmic_HQA_voltage_adjust 函数中的对应HV/LV /NV的
MT6328_VCORE1_CON11/ MT6328_VCORE1_CON12/ MT6328_SLDO_ANA_CON1。
以LTHV测试项为例,即把LTHV 的ETT log中所设置的0x71, 0xD数值(该数值仅为举例说明,以贵司实际读到的数值为准)写入pmic_HQA_Voltage_adjust函数中HVcHVm 的case 中
void pmic_HQA_Voltage_adjust(int nAdjust)
{
switch (nAdjust) {
case 0: /*HVcHVm*/ //HV高温测试
/*pmic_config_interface(MT6328_VCORE1_CON11, 0x6B, 0x7F, 0);*/ /* 1.265V */
#if defined(CONFIG_ARCH_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x71, 0x7F, 0); /* 1.310V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x71, 0x7F, 0); /* 1.310V */
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x65, 0x7F, 0); /* 1.230V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x65, 0x7F, 0); /* 1.230V */
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x0D, 0xF, 8); /* +0.06V (1.3V) */
pr_warn("========== HVcHVm ==========\r\n");
break;
case 1: /*HVcLVm*/
/*pmic_config_interface(MT6328_VCORE1_CON11, 0x6B, 0x7F, 0);*/ /* 1.265V */
#if defined(CONFIG_ARCH_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x71, 0x7F, 0); /* 1.310V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x71, 0x7F, 0); /* 1.310V */
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x04, 0xF, 8); /* -0.08V (1.16V) */
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x65, 0x7F, 0); /* 1.230V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x65, 0x7F, 0); /* 1.230V */
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x05, 0xF, 8); /* -1.00V (1.14V) */
#endif
pr_warn("========== HVcLVm ==========\r\n");
break;
case 2: /*LVcHVm*/ //LV低温测试
/*pmic_config_interface(MT6328_VCORE1_CON11, 0x46, 0x7F, 0);*/ /* 1.035V */
#if defined(CONFIG_ARCH_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x54, 0x7F, 0); /* 1.125V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x54, 0x7F, 0); /* 1.125V */
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x4B, 0x7F, 0); /* 1.070V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x4B, 0x7F, 0); /* 1.070V */
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x0D, 0xF, 8); /* +0.06V (1.3V) */
pr_warn("========== LVcHVm ==========\r\n");
break;
case 3: /*LVcLVm*/
/*pmic_config_interface(MT6328_VCORE1_CON11, 0x46, 0x7F, 0);*/ /* 1.035V */
#if defined(CONFIG_ARCH_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x54, 0x7F, 0); /* 1.125V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x54, 0x7F, 0); /* 1.125V */
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x04, 0xF, 8); /* -0.08V (1.16V)*/
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x4B, 0x7F, 0); /* 1.070V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x4B, 0x7F, 0); /* 1.070V */
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x05, 0xF, 8); /* -1.00V (1.14V) */
#endif
pr_warn("========== LVcLVm ==========\r\n");
break;
case 4: /*NV*/ //NV正常温度测试
#if defined(CONFIG_ARCH_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x68, 0x7F, 0); /* 1.25V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x68, 0x7F, 0); /* 1.25V */
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x58, 0x7F, 0); /* 1.15V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x58, 0x7F, 0); /* 1.15V */
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x01, 0xF, 8); /* -0.02V (1.22V) */
pr_warn("========== NV ==========\r\n");
break;
default: /*NV*/
#if defined(CONFIG_ARCH_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x68, 0x7F, 0); /* 1.25V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x68, 0x7F, 0); /* 1.25V */
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x58, 0x7F, 0); /* 1.15V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x58, 0x7F, 0); /* 1.15V */
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x01, 0xF, 8); /* -0.02V (1.22V) */
pr_warn("========== NV ==========\r\n");
break;
}
}
#if defined(CONFIG_ATC_DDR_STREE_TEST)
EXPORT_SYMBOL_GPL(pmic_HQA_Voltage_adjust); //添加函数导出,后面要用,否则编译会报错误
#endif
4、kernel-3.18\drivers\misc\mediatek\power\mt3561\pmic.c
在kernel-3.18\drivers\misc\mediatek\power\mt3561\pmic.c文件中添加#include "mt_dramc.h" 这个MACRO,如下:
#include <mt-plat/aee.h>
#if defined(CONFIG_ATC_DDR_STREE_TEST)
#include "mt_dramc.h" //添加宏
#endif
#include "mt_devinfo.h"
在pmic_mt_probe 函数中,添加如下橙色方框中的code. 所添加的pmic_HQA_Voltage_adjust函数,其参数0 , 3, 4分别代表了HV,LV,NV,开启不同的参数代表不同的测试项(即LTHV/HTLV/NTNV)。
在kernel-3.18\drivers\misc\mediatek\power\mt3561\pmic.c文件的
static int pmic_mt_probe(struct platform_device *dev)函数中添加:
static int pmic_mt_probe(struct platform_device *dev)
{
int ret_device_file = 0, i;
#ifdef DLPT_FEATURE_SUPPORT
const int *pimix;
int len = 0;
#endif
#if defined(CONFIG_MTK_SMART_BATTERY)
struct device_node *np;
u32 val;
/* check customer setting */
np = of_find_compatible_node(NULL, NULL, "mediatek,bat_meter");
if (np == NULL)
PMICLOG("[PMIC]pmic_mt_probe get bat_meter node failed\n");
if (of_property_read_u32(np, "car_tune_value", &val) == 0) {
batt_meter_cust_data.car_tune_value = (int)val;
PMICLOG("Get car_tune_value from DT: %d\n", batt_meter_cust_data.car_tune_value);
} else {
batt_meter_cust_data.car_tune_value = CAR_TUNE_VALUE;
PMICLOG("Get car_tune_value from cust header\n");
}
#endif
/*--- initailize pmic_suspend_state ---*/
pmic_suspend_state = false;
#ifdef DLPT_FEATURE_SUPPORT
pimix = NULL;
if (of_scan_flat_dt(fb_early_init_dt_get_chosen, NULL) > 0)
pimix = of_get_flat_dt_prop(pmic_node, "atag,imix_r", &len);
if (pimix == NULL) {
pr_err(" pimix==NULL len=%d\n", len);
} else {
pr_err(" pimix=%d\n", *pimix);
ptim_rac_val_avg = *pimix;
}
PMICLOG("******** MT pmic driver probe!! ********%d\n", ptim_rac_val_avg);
pr_debug("[PMIC]pmic_mt_probe %s %s\n", dev->name, dev->id_entry->name);
#endif /* #ifdef DLPT_FEATURE_SUPPORT */
/*get PMIC CID */
pr_debug
("PMIC CID=0x%x PowerGoodStatus = 0x%x OCStatus = 0x%x ThermalStatus = 0x%x rsvStatus = 0x%x\n",
pmic_get_register_value(PMIC_SWCID), upmu_get_reg_value(0x21c),
upmu_get_reg_value(0x214), upmu_get_reg_value(0x21e), upmu_get_reg_value(0x2a6));
upmu_set_reg_value(0x2a6, 0xff);
#if defined(CONFIG_ARCH_MT3562)
PMICLOG("[PMIC_INIT_SETTING_V1] delay to MT6311 init\n");
#else
PMIC_INIT_SETTING_V1();
PMICLOG("[PMIC_INIT_SETTING_V1] Done\n");
#if defined(CONFIG_ATC_DDR_STREE_TEST) //压力测试开始
//adde for stress test start
//HVcore HVmem
//pmic_HQA_Voltage_adjust(0); //HV测试时打开
//LVcore LVmem
//pmic_HQA_Voltage_adjust(3); //LV测试时打开
//NVcore NVmem
pmic_HQA_Voltage_adjust(4); //NV测试时打开
pmic_voltage_read(0);
//adde for stress test end
#endif
#endif
#if !defined CONFIG_MTK_LEGACY
/* replace by DTS*/
#else
PMIC_CUSTOM_SETTING_V1();
PMICLOG("[PMIC_CUSTOM_SETTING_V1] Done\n");
#endif /*End of #if !defined CONFIG_MTK_LEGACY */
/*#if defined(CONFIG_MTK_FPGA)*/
#if 0
PMICLOG("[PMIC_EINT_SETTING] disable when CONFIG_MTK_FPGA\n");
#else
/*PMIC Interrupt Service */
PMIC_EINT_SETTING();
PMICLOG("[PMIC_EINT_SETTING] Done\n");
..................................
............................
}
5)在kernel-3.18\drivers\misc\mediatek\power\Makefile文件中添加
kernel-3.18\drivers\misc\mediatek\dramc\mt3561\mt_dramc.h头文件路径,否则编译会提示kernel-3.18\drivers\misc\mediatek\power\mt3561\pmic.c文件时找不到mt_dramc.h这个头文件,如下:
obj-y += $(subst ",,$(CONFIG_MTK_PLATFORM))/
###添加CONFIG_ATC_DDR_STREE_TEST压力测试的开关项,保证在不打开压力测试时将不被编译进来
subdir-ccflags-$(CONFIG_ATC_DDR_STREE_TEST) += -I$(srctree)/drivers/misc/mediatek/dramc/mt3561/
##subdir-ccflags-y += -I$(srctree)/drivers/misc/mediatek/dramc/mt3561/
6)如果kernel-3.18\drivers\misc\mediatek\dramc\mt3561\mt_dramc.h文件中的
#define VCORE1_ADJ_TEST
这个没有打开的话,需要打开这个开关。我们代码默认已经打开,不需要再修改。
3、编译preloader和内核、bootimage,然后下载preloader.bin和bootimage.img即可测试
在源码的顶层目录中执行:
AndroidM_3561_after$ source build/envsetup.sh
AndroidM_3561_after$ lunch full_evb3561sv_w_no2-userdebug
AndroidM_3561_after$ make -j24 pl && make -j24 kernel && make -j24 bootimage
注意:在分别测试HV、LV、NV的时候,打开以下三个文件对应的开关
kernel-3.18\drivers\misc\mediatek\power\mt3561\pmic.c
kernel-3.18\drivers\misc\mediatek\base\power\mt3561\mt_vcore_dvfs_2.c
vendor\mediatek\proprietary\bootable\bootloader\preloader\platform\mt3561\src\drivers\platform.c
编译对应的preloader.bin和bootimage.img文件,分别下载进行测试,具体测试的方法再下一篇文档中说明。